diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-03-18 14:39:33 +0100 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-03-18 14:52:01 +0100 |
commit | fdd32db83f482e2d4611e878b38a8101a70fb363 (patch) | |
tree | 8762565d313034a8f2db25b469c7676acc02001a | |
parent | 02ae9a4b9ff491709b0660fc06ab5f331b97907d (diff) |
overlays: cosmetic clean-up
Cosmetic clean-up without any functional impact:
- re-order overlays in Makefile alphabetically
- get rid of obsolete includes
- add note that CSI Camera Module 5MP OV5640 is no longer orderable at
Toradex
- re-order properties alphabetically
- re-order nodes alphabetically
- fix indentation and line-spacing
- use correct NXP SoC naming nomenclature
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r-- | overlays/Makefile | 16 | ||||
-rw-r--r-- | overlays/verdin-imx8mm_lt8912_overlay.dts | 2 | ||||
-rw-r--r-- | overlays/verdin-imx8mm_ov5640_overlay.dts | 8 | ||||
-rw-r--r-- | overlays/verdin-imx8mm_sn65dsi84_overlay.dts | 4 | ||||
-rw-r--r-- | overlays/verdin-imx8mp_lt8912_overlay.dts | 8 | ||||
-rw-r--r-- | overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts | 7 |
6 files changed, 20 insertions, 25 deletions
diff --git a/overlays/Makefile b/overlays/Makefile index 3bd92c1..a2d4401 100644 --- a/overlays/Makefile +++ b/overlays/Makefile @@ -20,18 +20,18 @@ HOSTCC := gcc $(DTS_INCLUDES) PWD := $(shell pwd) dtb-y += apalis-imx6_atmel-mxt_overlay.dtbo +dtb-y += apalis-imx6_fusion-f0710a_overlay.dtbo dtb-y += apalis-imx6_hdmi_overlay.dtbo dtb-y += apalis-imx6_lcd-lt161010_overlay.dtbo dtb-y += apalis-imx6_lvds-lt170410_overlay.dtbo dtb-y += apalis-imx6_stmpe-ts_overlay.dtbo dtb-y += apalis-imx6_vga_overlay.dtbo -dtb-y += apalis-imx6_fusion-f0710a_overlay.dtbo dtb-y += apalis-imx8_ar0521_overlay.dtbo dtb-y += apalis-imx8_atmel-mxt_overlay.dtbo dtb-y += apalis-imx8_hdmi_overlay.dtbo dtb-y += apalis-imx8_lvds_overlay.dtbo -dtb-y += apalis-imx8_ov5640_overlay.dtbo dtb-y += apalis-imx8_ov5640-2_overlay.dtbo +dtb-y += apalis-imx8_ov5640_overlay.dtbo dtb-y += apalis-imx8x_ad7879_overlay.dtbo dtb-y += apalis-imx8x_atmel-mxt_overlay.dtbo dtb-y += apalis-imx8x_dsihdmi_overlay.dtbo @@ -45,28 +45,28 @@ dtb-y += colibri-imx6_fusion-f0710a-connector_overlay.dtbo dtb-y += colibri-imx6_hdmi_overlay.dtbo dtb-y += colibri-imx6_lcd-lt161010_overlay.dtbo dtb-y += colibri-imx6_lcd-lt170410_overlay.dtbo -dtb-y += colibri-imx6_stmpe-ts_overlay.dtbo dtb-y += colibri-imx6_lcd-vga_overlay.dtbo +dtb-y += colibri-imx6_stmpe-ts_overlay.dtbo dtb-y += colibri-imx7_ad7879_overlay.dtbo dtb-y += colibri-imx7_atmel-mxt-adapter_overlay.dtbo dtb-y += colibri-imx7_atmel-mxt-connector_overlay.dtbo +dtb-y += colibri-imx7-eval_spidev_overlay.dtbo dtb-y += colibri-imx7_fusion-f0710a-adapter_overlay.dtbo dtb-y += colibri-imx7_fusion-f0710a-connector_overlay.dtbo -dtb-y += colibri-imx7-eval_spidev_overlay.dtbo dtb-y += colibri-imx7_lcd-lt161010_overlay.dtbo dtb-y += colibri-imx7_lcd-lt170410_overlay.dtbo dtb-y += colibri-imx7_lcd-vga_overlay.dtbo -dtb-y += colibri-imx8x-eval_spidev_overlay.dtbo dtb-y += colibri-imx8x_ad7879_overlay.dtbo dtb-y += colibri-imx8x_atmel-mxt-adapter_overlay.dtbo dtb-y += colibri-imx8x_atmel-mxt-connector_overlay.dtbo -dtb-y += colibri-imx8x_parallel-rgb_overlay.dtbo dtb-y += colibri-imx8x_dsihdmi_overlay.dtbo +dtb-y += colibri-imx8x-eval_spidev_overlay.dtbo +dtb-y += colibri-imx8x_parallel-rgb_overlay.dtbo dtb-y += display-dpi-lt170410_overlay.dtbo dtb-y += display-edt5.7_overlay.dtbo dtb-y += display-edt7_overlay.dtbo -dtb-y += display-fullhd_overlay.dtbo dtb-y += display-fullhd-imx6_overlay.dtbo +dtb-y += display-fullhd_overlay.dtbo dtb-y += display-lt161010_overlay.dtbo dtb-y += display-lt170410_overlay.dtbo dtb-y += display-vga_overlay.dtbo @@ -77,8 +77,8 @@ dtb-y += verdin-imx8mm_sn65dsi84_overlay.dtbo dtb-y += verdin-imx8mp_lt8912_overlay.dtbo dtb-y += verdin-imx8mp_native-hdmi_overlay.dtbo dtb-y += verdin-imx8mp_ov5640_overlay.dtbo -dtb-y += verdin-imx8mp_sn65dsi84_overlay.dtbo dtb-y += verdin-imx8mp_sn65dsi84-lt170410_overlay.dtbo +dtb-y += verdin-imx8mp_sn65dsi84_overlay.dtbo targets += $(dtb-y) always := $(dtb-y) diff --git a/overlays/verdin-imx8mm_lt8912_overlay.dts b/overlays/verdin-imx8mm_lt8912_overlay.dts index 3ddbc99..f945b8f 100644 --- a/overlays/verdin-imx8mm_lt8912_overlay.dts +++ b/overlays/verdin-imx8mm_lt8912_overlay.dts @@ -8,8 +8,6 @@ /dts-v1/; /plugin/; -#include <dt-bindings/gpio/gpio.h> - / { compatible = "toradex,verdin-imx8mm"; }; diff --git a/overlays/verdin-imx8mm_ov5640_overlay.dts b/overlays/verdin-imx8mm_ov5640_overlay.dts index 503727b..9a0b1c1 100644 --- a/overlays/verdin-imx8mm_ov5640_overlay.dts +++ b/overlays/verdin-imx8mm_ov5640_overlay.dts @@ -3,7 +3,7 @@ * Copyright 2020-2021 Toradex */ -// CSI Camera Module 5MP OV5640 orderable at Toradex. +// CSI Camera Module 5MP OV5640 previously orderable at Toradex. /dts-v1/; /plugin/; @@ -36,18 +36,18 @@ assigned-clocks = <&clk IMX8MM_CLK_CLKO1>; assigned-clock-parents = <&clk IMX8MM_CLK_24M>; assigned-clock-rates = <24000000>; + AVDD-supply = <®_3p3v>; compatible = "ovti,ov5640_mipi"; clock-names = "csi_mclk"; clocks = <&clk IMX8MM_CLK_CLKO1>; + csi_id = <0>; DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_3p3v>; DVDD-supply = <®_3p3v>; - PVDD-supply = <®_3p3v>; - csi_id = <0>; mclk = <24000000>; mclk_source = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; + PVDD-supply = <®_3p3v>; pwn-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; reg = <0x3c>; rst-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; diff --git a/overlays/verdin-imx8mm_sn65dsi84_overlay.dts b/overlays/verdin-imx8mm_sn65dsi84_overlay.dts index af7cd5e..10362ac 100644 --- a/overlays/verdin-imx8mm_sn65dsi84_overlay.dts +++ b/overlays/verdin-imx8mm_sn65dsi84_overlay.dts @@ -8,10 +8,6 @@ /dts-v1/; /plugin/; -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include "dt-bindings/pwm/pwm.h" - / { compatible = "toradex,verdin-imx8mm"; }; diff --git a/overlays/verdin-imx8mp_lt8912_overlay.dts b/overlays/verdin-imx8mp_lt8912_overlay.dts index adbed2b..db560e6 100644 --- a/overlays/verdin-imx8mp_lt8912_overlay.dts +++ b/overlays/verdin-imx8mp_lt8912_overlay.dts @@ -39,10 +39,6 @@ status = "okay"; }; -&ml_vipsi { - status = "okay"; -}; - &mipi_dsi { #address-cells = <1>; #size-cells = <0>; @@ -62,6 +58,10 @@ status = "okay"; }; +&ml_vipsi { + status = "okay"; +}; + &pwm3 { /* PWM 3 conflicts with the HPD signal from the adapter */ status = "disabled"; diff --git a/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts b/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts index 1b2064a..d8e585d 100644 --- a/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts +++ b/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts @@ -3,7 +3,7 @@ * Copyright 2020-2021 Toradex */ -// Verdin DSI to LVDS Adapter with connected LT170410 display (10inch) with a +// Verdin DSI to LVDS Adapter with connected LT170410 display (10 inch) with a // resolution of 1280x800 pixel. Adapter and display can be ordered at Toradex. /dts-v1/; @@ -22,10 +22,11 @@ display-timings { native-mode = <&lvds_timing0>; - lvds_timing0: lt170410_2whc { + + lvds_timing0: lt170410_2whc { /* * PLL1 is at 2079000000, take PLL1/30 - * otherwise we don't get a picture NXP i.MX8M Plus + * otherwise we don't get a picture on NXP i.MX 8M Plus */ clock-frequency = <69300000>; hactive = <1280 1280 1280>; |