From fdd32db83f482e2d4611e878b38a8101a70fb363 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Thu, 18 Mar 2021 14:39:33 +0100 Subject: overlays: cosmetic clean-up Cosmetic clean-up without any functional impact: - re-order overlays in Makefile alphabetically - get rid of obsolete includes - add note that CSI Camera Module 5MP OV5640 is no longer orderable at Toradex - re-order properties alphabetically - re-order nodes alphabetically - fix indentation and line-spacing - use correct NXP SoC naming nomenclature Signed-off-by: Marcel Ziswiler --- overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts') diff --git a/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts b/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts index 1b2064a..d8e585d 100644 --- a/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts +++ b/overlays/verdin-imx8mp_sn65dsi84-lt170410_overlay.dts @@ -3,7 +3,7 @@ * Copyright 2020-2021 Toradex */ -// Verdin DSI to LVDS Adapter with connected LT170410 display (10inch) with a +// Verdin DSI to LVDS Adapter with connected LT170410 display (10 inch) with a // resolution of 1280x800 pixel. Adapter and display can be ordered at Toradex. /dts-v1/; @@ -22,10 +22,11 @@ display-timings { native-mode = <&lvds_timing0>; - lvds_timing0: lt170410_2whc { + + lvds_timing0: lt170410_2whc { /* * PLL1 is at 2079000000, take PLL1/30 - * otherwise we don't get a picture NXP i.MX8M Plus + * otherwise we don't get a picture on NXP i.MX 8M Plus */ clock-frequency = <69300000>; hactive = <1280 1280 1280>; -- cgit v1.2.3