diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-09-03 14:15:27 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2018-09-03 14:15:27 +0800 |
| commit | 701e7961dfe568d724343c4e2897907cb34cc276 (patch) | |
| tree | 19c2fc5fccc31b07feaed3834cfed6b6d90f644e | |
| parent | 7b62aea017c0366b5132dedfe9711cd094cd5cc3 (diff) | |
imx8mq: update chip revision method for B1
i.MX8MQ B1's chip revision is identified by reading
OCOTP offset 0x40, the magic number 0xff0055aa is
for B1.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| -rw-r--r-- | plat/imx/imx8mq/include/platform_def.h | 1 | ||||
| -rw-r--r-- | plat/imx/imx8mq/src.c | 7 |
2 files changed, 7 insertions, 1 deletions
diff --git a/plat/imx/imx8mq/include/platform_def.h b/plat/imx/imx8mq/include/platform_def.h index 7f3a2c82..f2c3d112 100644 --- a/plat/imx/imx8mq/include/platform_def.h +++ b/plat/imx/imx8mq/include/platform_def.h @@ -53,6 +53,7 @@ #define IMX_AIPS1_BASE 0x30200000 #define IMX_AIPS3_ARB_BASE 0x30800000 #define IMX_ANAMIX_BASE 0x30360000 +#define IMX_OCOTP_BASE 0x30350000 #define IMX_CCM_BASE 0x30380000 #define IMX_SRC_BASE 0x30390000 #define IMX_GPC_BASE 0x303a0000 diff --git a/plat/imx/imx8mq/src.c b/plat/imx/imx8mq/src.c index eb36c239..2ba6c1a1 100644 --- a/plat/imx/imx8mq/src.c +++ b/plat/imx/imx8mq/src.c @@ -25,6 +25,7 @@ #define DIGPROG 0x6c #define SW_INFO_A0 0x800 #define SW_INFO_B0 0x83C +#define SW_INFO_B1 0x40 int imx_src_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3) @@ -59,9 +60,13 @@ int imx_soc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, rom_version = mmio_read_32(IMX_ROM_BASE + SW_INFO_A0); if (rom_version != 0x10) { rom_version = mmio_read_32(IMX_ROM_BASE + SW_INFO_B0); - if (rom_version >= 0x20) { + if (rom_version == 0x20) { val &= ~0xff; val |= rom_version; + } else if (mmio_read_32(IMX_OCOTP_BASE + SW_INFO_B1) + == 0xff0055aa) { + /* 0xff0055aa is magic number for B1 */ + val = 0x21; } } |