diff options
| author | Bai Ping <ping.bai@nxp.com> | 2018-10-12 16:09:50 +0800 |
|---|---|---|
| committer | Bai Ping <ping.bai@nxp.com> | 2018-10-12 16:35:34 +0800 |
| commit | 9aa39de9f366046a363a6754b40e9f277e73adbd (patch) | |
| tree | b3a4d2dacbd655d7973b6155563f42d552cc2d74 | |
| parent | 058a759ffed26797314bc0a52db3c440240fa6a5 (diff) | |
plat: imx8m: update the DVFS flow for DDR4
Update the DDR4 DVFS flow
Signed-off-by: Bai Ping <ping.bai@nxp.com>
| -rw-r--r-- | plat/imx/common/imx8m/ddr4_dvfs.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/plat/imx/common/imx8m/ddr4_dvfs.c b/plat/imx/common/imx8m/ddr4_dvfs.c index 71237f0a..951d1770 100644 --- a/plat/imx/common/imx8m/ddr4_dvfs.c +++ b/plat/imx/common/imx8m/ddr4_dvfs.c @@ -162,7 +162,7 @@ void ddr4_dll_change(unsigned int num_rank, unsigned int pstate, unsigned int cu mmio_setbits_32(DDRC_ZQCTL0(0), (1 << 31)); /* 3. Set RFSHCTL3.dis_auto_refresh=1, to disable automatic refreshes */ - /* mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1); */ + mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1); /* 4. Ensure all commands have been flushed from the uMCTL2 by polling */ do { tmp = 0x36000000 & mmio_read_32(DDRC_DBGCAM(0)); @@ -215,9 +215,6 @@ void ddr4_dll_change(unsigned int num_rank, unsigned int pstate, unsigned int cu tmp = 0x3f & (mmio_read_32((DDRC_STAT(0)))); } while (tmp != 0x23); - /* FIXME Set RFSHCTL3.dis_auto_refresh=1, to disable automatic refreshes ??? */ - mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1); - /* 11. Set the MSTR.dll_off_mode = 1 or 0. */ if (dll_sw == ON2OFF) mmio_setbits_32(DDRC_MSTR(0), (1 << 15)); |