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authorRanjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>2017-08-28 19:16:33 -0500
committerAnson Huang <Anson.Huang@nxp.com>2017-08-29 17:13:00 +0800
commit8fa9a67cc4938ce6c2c1c09a2d0c9e3f7dcd835c (patch)
tree3da366edbc83cad08439129da410ef55cac46809
parent96f4d3768c8b35d2d8cbcce75617790f3bb037f6 (diff)
Update to the latest SCFW API.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/include/sci/svc/pad/api.h246
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/include/sci/svc/pm/api.h160
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/include/sci/svc/rm/api.h170
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/include/sci/types.h213
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c89
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/sci/svc/pad/rpc.h37
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/sci/svc/pm/rpc.h35
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c108
-rwxr-xr-x[-rw-r--r--]plat/freescale/common/sci/svc/rm/rpc.h62
9 files changed, 689 insertions, 431 deletions
diff --git a/plat/freescale/common/include/sci/svc/pad/api.h b/plat/freescale/common/include/sci/svc/pad/api.h
index fb6e78c1..c57b48a0 100644..100755
--- a/plat/freescale/common/include/sci/svc/pad/api.h
+++ b/plat/freescale/common/include/sci/svc/pad/api.h
@@ -42,7 +42,11 @@
* info on these can be found in the associated Reference Manual.
*
* Pads are managed as a resource by the Resource Manager (RM). They have
- * assigned owners and only the owners can configure the pads.
+ * assigned owners and only the owners can configure the pads. Some of the
+ * pads are reserved for use by the SCFW itself and this can be overriden
+ * with the implementation of board_config_sc(). Additionally, pads may
+ * be assigned to various other partitions via SCD or via the implementation
+ * of board_system_config().
*
* @{
*/
@@ -61,7 +65,79 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_PAD_MUX_W 3 /*!< Width of mux parameter */
+#define SC_PAD_MUX_W 3 /* Width of mux parameter */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_config_t
+ */
+/*@{*/
+#define SC_PAD_CONFIG_NORMAL 0 /* Normal */
+#define SC_PAD_CONFIG_OD 1 /* Open Drain */
+#define SC_PAD_CONFIG_OD_IN 2 /* Open Drain and input */
+#define SC_PAD_CONFIG_OUT_IN 3 /* Output and input */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_iso_t
+ */
+/*@{*/
+#define SC_PAD_ISO_OFF 0 /* ISO latch is transparent */
+#define SC_PAD_ISO_EARLY 1 /* Follow EARLY_ISO */
+#define SC_PAD_ISO_LATE 2 /* Follow LATE_ISO */
+#define SC_PAD_ISO_ON 3 /* ISO latched data is held */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_dse_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_DSE_18V_1MA 0 /* Drive strength of 1mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_2MA 1 /* Drive strength of 2mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_4MA 2 /* Drive strength of 4mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_6MA 3 /* Drive strength of 6mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_8MA 4 /* Drive strength of 8mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_10MA 5 /* Drive strength of 10mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_12MA 6 /* Drive strength of 12mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_HS 7 /* High-speed drive strength for 1.8v */
+#define SC_PAD_28FDSOI_DSE_33V_2MA 0 /* Drive strength of 2mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_4MA 1 /* Drive strength of 4mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_8MA 2 /* Drive strength of 8mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_12MA 3 /* Drive strength of 12mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_DV_HIGH 0 /* High drive strength for dual volt */
+#define SC_PAD_28FDSOI_DSE_DV_LOW 1 /* Low drive strength for dual volt */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_ps_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_PS_KEEPER 0 /* Bus-keeper (only valid for 1.8v) */
+#define SC_PAD_28FDSOI_PS_PU 1 /* Pull-up */
+#define SC_PAD_28FDSOI_PS_PD 2 /* Pull-down */
+#define SC_PAD_28FDSOI_PS_NONE 3 /* No pull (disabled) */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_pus_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_PUS_30K_PD 0 /* 30K pull-down */
+#define SC_PAD_28FDSOI_PUS_100K_PU 1 /* 100K pull-up */
+#define SC_PAD_28FDSOI_PUS_3K_PU 2 /* 3K pull-up */
+#define SC_PAD_28FDSOI_PUS_30K_PU 3 /* 30K pull-up */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_wakeup_t
+ */
+/*@{*/
+#define SC_PAD_WAKEUP_OFF 0 /* Off */
+#define SC_PAD_WAKEUP_CLEAR 1 /* Clears pending flag */
+#define SC_PAD_WAKEUP_LOW_LVL 4 /* Low level */
+#define SC_PAD_WAKEUP_FALL_EDGE 5 /* Falling edge */
+#define SC_PAD_WAKEUP_RISE_EDGE 6 /* Rising edge */
+#define SC_PAD_WAKEUP_HIGH_LVL 7 /* High-level */
/*@}*/
/* Types */
@@ -73,13 +149,7 @@
* when the output is not driven. The IN options are less common and
* force an input connection even when driving the output.
*/
-typedef enum sc_pad_config_e
-{
- SC_PAD_CONFIG_NORMAL = 0, /*!< Normal */
- SC_PAD_CONFIG_OD = 1, /*!< Open Drain */
- SC_PAD_CONFIG_OD_IN = 2, /*!< Open Drain and input */
- SC_PAD_CONFIG_OUT_IN = 3 /*!< Output and input */
-} sc_pad_config_t;
+typedef uint8_t sc_pad_config_t;
/*!
* This type is used to declare a pad low-power isolation config.
@@ -87,84 +157,30 @@ typedef enum sc_pad_config_e
* an output pad is directly determined by another input pad. The
* other two are only used when SW wants to directly contol isolation.
*/
-typedef enum sc_pad_iso_e
-{
- SC_PAD_ISO_OFF = 0, /*!< ISO latch is transparent */
- SC_PAD_ISO_EARLY = 1, /*!< Follow EARLY_ISO */
- SC_PAD_ISO_LATE = 2, /*!< Follow LATE_ISO */
- SC_PAD_ISO_ON = 3 /*!< ISO latched data is held */
-} sc_pad_iso_t;
-
-/*!
- * This type is used to declare a drive strength. Note it is specific
- * to 28LPP.
- */
-typedef enum sc_pad_28lpp_dse_e
-{
- SC_PAD_28LPP_DSE_x1 = 0, /*!< Drive strength x1 */
- SC_PAD_28LPP_DSE_x4 = 1, /*!< Drive strength x4 */
- SC_PAD_28LPP_DSE_x2 = 2, /*!< Drive strength x2 */
- SC_PAD_28LPP_DSE_x6 = 3 /*!< Drive strength x6 */
-} sc_pad_28lpp_dse_t;
+typedef uint8_t sc_pad_iso_t;
/*!
* This type is used to declare a drive strength. Note it is specific
* to 28FDSOI. Also note that valid values depend on the pad type.
*/
-typedef enum sc_pad_28fdsio_dse_e
-{
- SC_PAD_28FDSOI_DSE_18V_1MA = 0, /*!< Drive strength of 1mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_2MA = 1, /*!< Drive strength of 2mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_4MA = 2, /*!< Drive strength of 4mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_6MA = 3, /*!< Drive strength of 6mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_8MA = 4, /*!< Drive strength of 8mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_10MA = 5, /*!< Drive strength of 10mA for 1.8v */
- SC_PAD_28FDSOI_DSE_18V_12MA = 6, /*!< Drive strength of 12mA for 1.8v */
- SC_PAD_28FDSOI_DSE_33V_2MA = 0, /*!< Drive strength of 2mA for 3.3v */
- SC_PAD_28FDSOI_DSE_33V_4MA = 1, /*!< Drive strength of 4mA for 3.3v */
- SC_PAD_28FDSOI_DSE_33V_8MA = 2, /*!< Drive strength of 8mA for 3.3v */
- SC_PAD_28FDSOI_DSE_33V_12MA = 3, /*!< Drive strength of 12mA for 3.3v */
- SC_PAD_28FDSOI_DSE_33V_HS = 7, /*!< High-speed drive strength for 1.8v */
- SC_PAD_28FDSOI_DSE_DV_LOW = 0, /*!< Low drive strength for dual volt */
- SC_PAD_28FDSOI_DSE_DV_HIGH = 1 /*!< High drive strength for dual volt */
-} sc_pad_28fdsoi_dse_t;
+typedef uint8_t sc_pad_28fdsoi_dse_t;
/*!
* This type is used to declare a pull select. Note it is specific
- * to 28LPP.
+ * to 28FDSOI.
*/
-typedef enum sc_pad_28lpp_ps_e
-{
- SC_PAD_28LPP_PS_PD = 0, /*!< Pull down */
- SC_PAD_28LPP_PS_PU_5K = 1, /*!< 5K pull up */
- SC_PAD_28LPP_PS_PU_47K = 2, /*!< 47K pull up */
- SC_PAD_28LPP_PS_PU_100K = 3 /*!< 100K pull up */
-} sc_pad_28lpp_ps_t;
+typedef uint8_t sc_pad_28fdsoi_ps_t;
/*!
- * This type is used to declare a pull select. Note it is specific
- * to 28FDSOI.
+ * This type is used to declare a pull-up select. Note it is specific
+ * to 28FDSOI HSIC pads.
*/
-typedef enum sc_pad_28fdsoi_ps_e
-{
- SC_PAD_28FDSOI_PS_KEEPER = 0, /*!< Bus-keeper (only valid for 1.8v) */
- SC_PAD_28FDSOI_PS_PU = 1, /*!< Pull-up */
- SC_PAD_28FDSOI_PS_PD = 2, /*!< Pull-down */
- SC_PAD_28FDSOI_PS_NONE = 3 /*!< No pull (disabled) */
-} sc_pad_28fdsoi_ps_t;
+typedef uint8_t sc_pad_28fdsoi_pus_t;
/*!
* This type is used to declare a wakeup mode of a pad.
*/
-typedef enum sc_pad_wakeup_e
-{
- SC_PAD_WAKEUP_OFF = 0, /*!< Off */
- SC_PAD_WAKEUP_CLEAR = 1, /*!< Clears pending flag */
- SC_PAD_WAKEUP_LOW_LVL = 4, /*!< Low level */
- SC_PAD_WAKEUP_FALL_EDGE = 5, /*!< Falling edge */
- SC_PAD_WAKEUP_RISE_EDGE = 6, /*!< Rising edge */
- SC_PAD_WAKEUP_HIGH_LVL = 7 /*!< High-level */
-} sc_pad_wakeup_t;
+typedef uint8_t sc_pad_wakeup_t;
/* Functions */
@@ -213,7 +229,8 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso);
+ uint8_t *mux, sc_pad_config_t *config,
+ sc_pad_iso_t *iso);
/*!
* This function configures the general purpose pad control. This
@@ -270,8 +287,7 @@ sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl);
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t wakeup);
+sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup);
/*!
* This function gets the wakeup mode of a pad.
@@ -288,8 +304,7 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t *wakeup);
+sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t *wakeup);
/*!
* This function configures a pad.
@@ -340,8 +355,8 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux,
- sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl,
- sc_pad_wakeup_t *wakeup);
+ sc_pad_config_t *config, sc_pad_iso_t *iso,
+ uint32_t *ctrl, sc_pad_wakeup_t *wakeup);
/* @} */
@@ -394,14 +409,11 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
*/
/*!
- * This function configures the pad control specific to 28LPP.
+ * This function configures the pad control specific to 28FDSOI.
*
* @param[in] ipc IPC handle
* @param[in] pad pad to configure
* @param[in] dse drive strength
- * @param[in] sre slew rate
- * @param[in] hys hysteresis
- * @param[in] pe pull enable
* @param[in] ps pull select
*
* @return Returns an error code (SC_ERR_NONE = success).
@@ -413,19 +425,16 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe,
- sc_pad_28lpp_ps_t ps);
+sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t dse,
+ sc_pad_28fdsoi_ps_t ps);
/*!
- * This function gets the pad control specific to 28LPP.
+ * This function gets the pad control specific to 28FDSOI.
*
* @param[in] ipc IPC handle
* @param[in] pad pad to query
* @param[out] dse pointer to return drive strength
- * @param[out] sre pointer to return slew rate
- * @param[out] hys pointer to return hysteresis
- * @param[out] pe pointer to return pull enable
* @param[out] ps pointer to return pull select
*
* @return Returns an error code (SC_ERR_NONE = success).
@@ -437,9 +446,9 @@ sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe,
- sc_pad_28lpp_ps_t *ps);
+sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t *dse,
+ sc_pad_28fdsoi_ps_t *ps);
/*!
* This function configures the pad control specific to 28FDSOI.
@@ -447,7 +456,10 @@ sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
* @param[in] ipc IPC handle
* @param[in] pad pad to configure
* @param[in] dse drive strength
- * @param[in] ps pull select
+ * @param[in] hys hysteresis
+ * @param[in] pus pull-up select
+ * @param[in] pke pull keeper enable
+ * @param[in] pue pull-up enable
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -458,8 +470,10 @@ sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps);
+sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t dse, bool hys,
+ sc_pad_28fdsoi_pus_t pus, bool pke,
+ bool pue);
/*!
* This function gets the pad control specific to 28FDSOI.
@@ -467,7 +481,10 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
* @param[in] ipc IPC handle
* @param[in] pad pad to query
* @param[out] dse pointer to return drive strength
- * @param[out] ps pointer to return pull select
+ * @param[out] hys pointer to return hysteresis
+ * @param[out] pus pointer to return pull-up select
+ * @param[out] pke pointer to return pull keeper enable
+ * @param[out] pue pointer to return pull-up enable
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -478,8 +495,10 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps);
+sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t *dse, bool *hys,
+ sc_pad_28fdsoi_pus_t * pus, bool *pke,
+ bool *pue);
/*!
* This function configures the compensation control specific to 28FDSOI.
@@ -491,6 +510,7 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
* @param[in] rasrcp compensation code for PMOS
* @param[in] rasrcn compensation code for NMOS
* @param[in] nasrc_sel NASRC read select
+ * @param[in] psw_ovr 2.5v override
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -500,23 +520,28 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
* - SC_ERR_UNAVAILABLE if process not applicable
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
+ *
+ * Note \a psw_ovr is only applicable to pads supporting 2.5 volt
+ * operation (e.g. some Ethernet pads).
*/
sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn,
- bool nasrc_sel);
+ uint8_t compen, bool fastfrz,
+ uint8_t rasrcp, uint8_t rasrcn,
+ bool nasrc_sel, bool psw_ovr);
/*!
* This function gets the compensation control specific to 28FDSOI.
*
* @param[in] ipc IPC handle
* @param[in] pad pad to query
- * @param[in] compen pointer to return compensation/freeze mode
- * @param[in] fastfrz pointer to return fast freeze
- * @param[in] rasrcp pointer to return compensation code for PMOS
- * @param[in] rasrcn pointer to return compensation code for NMOS
- * @param[in] nasrc_sel pointer to return NASRC read select
- * @param[in] compok pointer to return compensation status
- * @param[in] nasrc pointer to return NASRCP/NASRCN
+ * @param[out] compen pointer to return compensation/freeze mode
+ * @param[out] fastfrz pointer to return fast freeze
+ * @param[out] rasrcp pointer to return compensation code for PMOS
+ * @param[out] rasrcn pointer to return compensation code for NMOS
+ * @param[out] nasrc_sel pointer to return NASRC read select
+ * @param[out] compok pointer to return compensation status
+ * @param[out] nasrc pointer to return NASRCP/NASRCN
+ * @param[out] psw_ovr pointer to return the 2.5v override
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -528,12 +553,13 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn,
- bool *nasrc_sel, bool *compok, uint8_t *nasrc);
+ uint8_t *compen, bool *fastfrz,
+ uint8_t *rasrcp, uint8_t *rasrcn,
+ bool *nasrc_sel, bool *compok,
+ uint8_t *nasrc, bool *psw_ovr);
/* @} */
#endif /* _SC_PAD_API_H */
/**@}*/
-
diff --git a/plat/freescale/common/include/sci/svc/pm/api.h b/plat/freescale/common/include/sci/svc/pm/api.h
index d6751289..2d88b7c7 100644..100755
--- a/plat/freescale/common/include/sci/svc/pm/api.h
+++ b/plat/freescale/common/include/sci/svc/pm/api.h
@@ -31,10 +31,10 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_PM_POWER_MODE_W 2 /*!< Width of sc_pm_power_mode_t */
-#define SC_PM_CLOCK_MODE_W 3 /*!< Width of sc_pm_clock_mode_t */
-#define SC_PM_RESET_TYPE_W 1 /*!< Width of sc_pm_reset_type_t */
-#define SC_PM_RESET_REASON_W 3 /*!< Width of sc_pm_reset_reason_t */
+#define SC_PM_POWER_MODE_W 2 /* Width of sc_pm_power_mode_t */
+#define SC_PM_CLOCK_MODE_W 3 /* Width of sc_pm_clock_mode_t */
+#define SC_PM_RESET_TYPE_W 2 /* Width of sc_pm_reset_type_t */
+#define SC_PM_RESET_REASON_W 3 /* Width of sc_pm_reset_reason_t */
/*@}*/
/*!
@@ -47,7 +47,82 @@
* @name Defines for ALL parameters
*/
/*@{*/
-#define SC_PM_CLK_ALL UINT8_MAX /*!< All clocks */
+#define SC_PM_CLK_ALL UINT8_MAX /* All clocks */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_power_mode_t
+ */
+/*@{*/
+#define SC_PM_PW_MODE_OFF 0 /* Power off */
+#define SC_PM_PW_MODE_STBY 1 /* Power in standby */
+#define SC_PM_PW_MODE_LP 2 /* Power in low-power */
+#define SC_PM_PW_MODE_ON 3 /* Power on */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_t
+ */
+/*@{*/
+#define SC_PM_CLK_SLV_BUS 0 /* Slave bus clock */
+#define SC_PM_CLK_MST_BUS 1 /* Master bus clock */
+#define SC_PM_CLK_PER 2 /* Peripheral clock */
+#define SC_PM_CLK_PHY 3 /* Phy clock */
+#define SC_PM_CLK_MISC 4 /* Misc clock */
+#define SC_PM_CLK_MISC0 0 /* Misc 0 clock */
+#define SC_PM_CLK_MISC1 1 /* Misc 1 clock */
+#define SC_PM_CLK_MISC2 2 /* Misc 2 clock */
+#define SC_PM_CLK_MISC3 3 /* Misc 3 clock */
+#define SC_PM_CLK_MISC4 4 /* Misc 4 clock */
+#define SC_PM_CLK_CPU 2 /* CPU clock */
+#define SC_PM_CLK_PLL 4 /* PLL */
+#define SC_PM_CLK_BYPASS 4 /* Bypass clock */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_mode_t
+ */
+/*@{*/
+#define SC_PM_CLK_MODE_ROM_INIT 0 /* Clock is initialized by ROM. */
+#define SC_PM_CLK_MODE_OFF 1 /* Clock is disabled */
+#define SC_PM_CLK_MODE_ON 2 /* Clock is enabled. */
+#define SC_PM_CLK_MODE_AUTOGATE_SW 3 /* Clock is in SW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_HW 4 /* Clock is in HW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5 /* Clock is in SW-HW autogate mode */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_parent_t
+ */
+/*@{*/
+#define SC_PM_PARENT_XTAL 0 /* Parent is XTAL. */
+#define SC_PM_PARENT_PLL0 1 /* Parent is PLL0 */
+#define SC_PM_PARENT_PLL1 2 /* Parent is PLL1 or PLL0/2 */
+#define SC_PM_PARENT_PLL2 3 /* Parent in PLL2 or PLL0/4 */
+#define SC_PM_PARENT_BYPS 4 /* Parent is a bypass clock. */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_reset_type_t
+ */
+/*@{*/
+#define SC_PM_RESET_TYPE_COLD 0 /* Cold reset */
+#define SC_PM_RESET_TYPE_WARM 1 /* Warm reset */
+#define SC_PM_RESET_TYPE_BOARD 2 /* Board reset */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_reset_reason_t
+ */
+/*@{*/
+#define SC_PM_RESET_REASON_POR 0 /* Power on reset */
+#define SC_PM_RESET_REASON_WARM 1 /* Warm reset */
+#define SC_PM_RESET_REASON_SW 2 /* Software reset */
+#define SC_PM_RESET_REASON_WDOG 3 /* Watchdog reset */
+#define SC_PM_RESET_REASON_LOCKUP 4 /* Lockup reset */
+#define SC_PM_RESET_REASON_TAMPER 5 /* Tamper reset */
+#define SC_PM_RESET_REASON_TEMP 6 /* Temp reset */
+#define SC_PM_RESET_REASON_LOW_VOLT 7 /* Low voltage reset */
/*@}*/
/* Types */
@@ -57,58 +132,22 @@
* SC_PM_PW_MODE_OFF and SC_PM_PW_MODE_ON. The other modes are used only
* as system power modes.
*/
-typedef enum sc_pm_power_mode_e
-{
- SC_PM_PW_MODE_OFF = 0, /*!< Power off */
- SC_PM_PW_MODE_STBY = 1, /*!< Power in standby */
- SC_PM_PW_MODE_LP = 2, /*!< Power in low-power */
- SC_PM_PW_MODE_ON = 3 /*!< Power on */
-} sc_pm_power_mode_t;
+typedef uint8_t sc_pm_power_mode_t;
/*!
* This type is used to declare a clock.
*/
-typedef enum sc_pm_clk_e
-{
- SC_PM_CLK_SLV_BUS = 0, /*!< Slave bus clock */
- SC_PM_CLK_MST_BUS = 1, /*!< Master bus clock */
- SC_PM_CLK_PER = 2, /*!< Peripheral clock */
- SC_PM_CLK_PHY = 3, /*!< Phy clock */
- SC_PM_CLK_MISC = 4, /*!< Misc clock */
- SC_PM_CLK_MISC0 = 0, /*!< Misc 0 clock */
- SC_PM_CLK_MISC1 = 1, /*!< Misc 1 clock */
- SC_PM_CLK_MISC2 = 2, /*!< Misc 2 clock */
- SC_PM_CLK_MISC3 = 3, /*!< Misc 3 clock */
- SC_PM_CLK_MISC4 = 4, /*!< Misc 4 clock */
- SC_PM_CLK_CPU = 2, /*!< CPU clock */
- SC_PM_CLK_PLL = 4, /*!< PLL */
- SC_PM_CLK_BYPASS = 4 /*!< Bypass clock */
-} sc_pm_clk_t;
+typedef uint8_t sc_pm_clk_t;
/*!
* This type is used to declare a clock mode.
*/
-typedef enum sc_pm_clk_mode_e
-{
- SC_PM_CLK_MODE_ROM_INIT = 0, /*!< Clock is initialized by ROM. */
- SC_PM_CLK_MODE_OFF = 1, /*!< Clock is disabled */
- SC_PM_CLK_MODE_ON = 2, /*!< Clock is enabled. */
- SC_PM_CLK_MODE_AUTOGATE_SW = 3, /*!< Clock is in SW autogate mode */
- SC_PM_CLK_MODE_AUTOGATE_HW = 4, /*!< Clock is in HW autogate mode */
- SC_PM_CLK_MODE_AUTOGATE_SW_HW = 5, /*!< Clock is in SW-HW autogate mode */
-} sc_pm_clk_mode_t;
+typedef uint8_t sc_pm_clk_mode_t;
/*!
* This type is used to declare the clock parent.
*/
-typedef enum sc_pm_clk_parent_e
-{
- XTAL = 0, /*! < Parent is XTAL. */
- PLL0 = 1, /*! < Parent is PLL0 */
- PLL1 = 2, /*! < Parent is PLL1 or PLL0/2 */
- PLL2 = 3, /*! < Parent in PLL2 or PLL0/4 */
- BYPS = 4 /*! < Parent is a bypass clock. */
-} sc_pm_clk_parent_t;
+typedef uint8_t sc_pm_clk_parent_t;
/*!
* This type is used to declare clock rates.
@@ -118,26 +157,12 @@ typedef uint32_t sc_pm_clock_rate_t;
/*!
* This type is used to declare a desired reset type.
*/
-typedef enum sc_pm_reset_type_e
-{
- SC_PM_RESET_TYPE_COLD = 0, /*!< Cold reset */
- SC_PM_RESET_TYPE_WARM = 1 /*!< Warm reset */
-} sc_pm_reset_type_t;
+typedef uint8_t sc_pm_reset_type_t;
/*!
* This type is used to declare a reason for a reset.
*/
-typedef enum sc_pm_reset_reason_e
-{
- SC_PM_RESET_REASON_POR = 0, /*!< Power on reset */
- SC_PM_RESET_REASON_WARM = 1, /*!< Warm reset */
- SC_PM_RESET_REASON_SW = 2, /*!< Software reset */
- SC_PM_RESET_REASON_WDOG = 3, /*!< Watchdog reset */
- SC_PM_RESET_REASON_LOCKUP = 4, /*!< Lockup reset */
- SC_PM_RESET_REASON_TAMPER = 5, /*!< Tamper reset */
- SC_PM_RESET_REASON_TEMP = 6, /*!< Temp reset */
- SC_PM_RESET_REASON_LOW_VOLT = 7, /*!< Low voltage reset */
-} sc_pm_reset_reason_t;
+typedef uint8_t sc_pm_reset_reason_t;
/* Functions */
@@ -201,6 +226,11 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
* will return an error. Resources set to SC_PM_PW_MODE_ON will reflect the
* power mode of the partition and will change as that changes.
*
+ * Note some resources are still not accessible even when powered up if bus
+ * transactions go through a fabric not powered up. Examples of this are
+ * resources in display and capture subsystems which require the display
+ * controller or the imaging subsytem to be powered up first.
+ *
* @see sc_pm_set_sys_power_mode().
*/
sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
@@ -293,7 +323,6 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource,
sc_pm_clk_t clk, bool enable, bool autog);
-
/*!
* This function sets the parent of a resource's clock.
* This function should only be called when the clock is disabled.
@@ -367,6 +396,8 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type);
*
* @param[in] ipc IPC handle
* @param[out] reason pointer to return reset reason
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
*/
sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason);
@@ -407,6 +438,8 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt,
* of the booting CPU must be able to handle peripherals and SC state that
* that are not reset.
*
+ * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action.
+ *
* If this function returns, then the reset did not occur due to an
* invalid parameter.
*/
@@ -429,6 +462,8 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type);
* of the booting CPU must be able to handle peripherals and SC state that
* that are not reset.
*
+ * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action.
+ *
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors:
@@ -466,4 +501,3 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable,
#endif /* _SC_PM_API_H */
/**@}*/
-
diff --git a/plat/freescale/common/include/sci/svc/rm/api.h b/plat/freescale/common/include/sci/svc/rm/api.h
index eb472414..acf9338c 100644..100755
--- a/plat/freescale/common/include/sci/svc/rm/api.h
+++ b/plat/freescale/common/include/sci/svc/rm/api.h
@@ -30,20 +30,44 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_RM_PARTITION_W 5 /*!< Width of sc_rm_pt_t */
-#define SC_RM_MEMREG_W 6 /*!< Width of sc_rm_mr_t */
-#define SC_RM_DID_W 4 /*!< Width of sc_rm_did_t */
-#define SC_RM_SID_W 6 /*!< Width of sc_rm_sid_t */
-#define SC_RM_SPA_W 2 /*!< Width of sc_rm_spa_t */
-#define SC_RM_PERM_W 3 /*!< Width of sc_rm_perm_t */
+#define SC_RM_PARTITION_W 5 /* Width of sc_rm_pt_t */
+#define SC_RM_MEMREG_W 6 /* Width of sc_rm_mr_t */
+#define SC_RM_DID_W 4 /* Width of sc_rm_did_t */
+#define SC_RM_SID_W 6 /* Width of sc_rm_sid_t */
+#define SC_RM_SPA_W 2 /* Width of sc_rm_spa_t */
+#define SC_RM_PERM_W 3 /* Width of sc_rm_perm_t */
/*@}*/
/*!
* @name Defines for ALL parameters
*/
/*@{*/
-#define SC_RM_PT_ALL UINT8_MAX /*!< All partitions */
-#define SC_RM_MR_ALL UINT8_MAX /*!< All memory regions */
+#define SC_RM_PT_ALL UINT8_MAX /* All partitions */
+#define SC_RM_MR_ALL UINT8_MAX /* All memory regions */
+/*@}*/
+
+/*!
+ * @name Defines for sc_rm_spa_t
+ */
+/*@{*/
+#define SC_RM_SPA_PASSTHRU 0 /* Pass through (attribute driven by master) */
+#define SC_RM_SPA_PASSSID 1 /* Pass through and output on SID */
+#define SC_RM_SPA_ASSERT 2 /* Assert (force to be secure/privileged) */
+#define SC_RM_SPA_NEGATE 3 /* Negate (force to be non-secure/user) */
+/*@}*/
+
+/*!
+ * @name Defines for sc_rm_perm_t
+ */
+/*@{*/
+#define SC_RM_PERM_NONE 0 /* No access */
+#define SC_RM_PERM_SEC_R 1 /* Secure RO */
+#define SC_RM_PERM_SECPRIV_RW 2 /* Secure privilege R/W */
+#define SC_RM_PERM_SEC_RW 3 /* Secure R/W */
+#define SC_RM_PERM_NSPRIV_R 4 /* Secure R/W, non-secure privilege RO */
+#define SC_RM_PERM_NS_R 5 /* Secure R/W, non-secure RO */
+#define SC_RM_PERM_NSPRIV_RW 6 /* Secure R/W, non-secure privilege R/W */
+#define SC_RM_PERM_FULL 7 /* Full access */
/*@}*/
/* Types */
@@ -72,29 +96,13 @@ typedef uint16_t sc_rm_sid_t;
/*!
* This type is a used to declare master transaction attributes.
*/
-typedef enum sc_rm_spa_e
-{
- SC_RM_SPA_PASSTHRU = 0, /*!< Pass through (attribute driven by master) */
- SC_RM_SPA_PASSSID = 1, /*!< Pass through and output on SID */
- SC_RM_SPA_ASSERT = 2, /*!< Assert (force to be secure/privileged) */
- SC_RM_SPA_NEGATE = 3 /*!< Negate (force to be non-secure/user) */
-} sc_rm_spa_t;
+typedef uint8_t sc_rm_spa_t;
/*!
* This type is used to declare a resource/memory region access permission.
* Refer to the XRDC2 Block Guide for more information.
*/
-typedef enum sc_rm_perm_e
-{
- SC_RM_PERM_NONE = 0, /*!< No access */
- SC_RM_PERM_SEC_R = 1, /*!< Secure RO */
- SC_RM_PERM_SECPRIV_RW = 2, /*!< Secure privilege R/W */
- SC_RM_PERM_SEC_RW = 3, /*!< Secure R/W */
- SC_RM_PERM_NSPRIV_R = 4, /*!< Secure R/W, non-secure privilege RO */
- SC_RM_PERM_NS_R = 5, /*!< Secure R/W, non-secure RO */
- SC_RM_PERM_NSPRIV_RW = 6, /*!< Secure R/W, non-secure privilege R/W */
- SC_RM_PERM_FULL = 7 /*!< Full access */
-} sc_rm_perm_t;
+typedef uint8_t sc_rm_perm_t;
/* Functions */
@@ -135,7 +143,8 @@ typedef enum sc_rm_perm_e
* in what functions it can call, especially those associated with managing partitions.
*/
sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure,
- bool isolated, bool restricted, bool confidential, bool coherent);
+ bool isolated, bool restricted,
+ bool confidential, bool coherent);
/*!
* This function frees a partition and assigns all resources to the caller.
@@ -188,8 +197,7 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc);
* Assumes no assigned resources or memory regions yet! The number of static
* DID is fixed by the SC at boot.
*/
-sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_did_t did);
+sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did);
/*!
* This function locks a partition.
@@ -234,8 +242,7 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
* - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt,
* - SC_ERR_LOCKED if either partition is locked
*/
-sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_pt_t pt_parent);
+sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
/*!
* This function moves all movable resources/pads owned by a source partition
@@ -284,7 +291,12 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
*
* @return Returns an error code (SC_ERR_NONE = success).
*
- * Note a master will defaulted to SMMU bypass.
+ * This action resets the resource's master and peripheral attributes.
+ * Privilege attribute will be PASSTHRU, security attribute will be
+ * ASSERT if the partition si secure and NEGATE if it is not, and
+ * masters will defaulted to SMMU bypass. Access permissions will reset
+ * to SEC_RW for the owning partition only for secure partitions, FULL for
+ * non-secure. DEfault is no access by other partitions.
*
* Return errors:
* - SC_ERR_NOACCESS if caller's partition is restricted,
@@ -293,8 +305,7 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
* of the owner,
* - SC_ERR_LOCKED if the owning partition or \a pt is locked
*/
-sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rsrc_t resource);
+sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
/*!
* This function flags resources as movable or not.
@@ -320,6 +331,25 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
sc_rsrc_t resource_lst, bool movable);
/*!
+ * This function flags all of a subsystem's resources as movable
+ * or not.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] resource resource to use to identify subsystem
+ * @param[in] movable movable flag (true) is movable
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_PARM if a function argument is out of range
+ *
+ * Note \a resource is used to find the associated subsystem. Only
+ * resources owned by the caller are set.
+ */
+sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource,
+ bool movable);
+
+/*!
* This function sets attributes for a resource which is a bus master (i.e.
* capable of DMA).
*
@@ -342,7 +372,8 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
* changed if the caller's partition is secure.
*/
sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_spa_t sa, sc_rm_spa_t pa, bool smmu_bypass);
+ sc_rm_spa_t sa, sc_rm_spa_t pa,
+ bool smmu_bypass);
/*!
* This function sets the StreamID for a resource which is a bus master (i.e.
@@ -478,6 +509,34 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
sc_faddr_t addr_start, sc_faddr_t addr_end);
/*!
+ * This function requests that the SC split a memory region.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] mr handle of memory region to split
+ * @param[out] mr_ret return handle for new region; used for
+ * subsequent function calls
+ * associated with this region
+ * @param[in] addr_start start address of region (physical)
+ * @param[in] addr_end end address of region (physical)
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_PARM if the new memory region is not start/end part of mr,
+ * - SC_ERR_LOCKED if caller's partition is locked,
+ * - SC_ERR_PARM if the new memory region spans multiple existing regions,
+ * - SC_ERR_NOACCESS if caller's partition does not own the memory containing
+ * the new region,
+ * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation
+ * space)
+ *
+ * Note the new region must start or end on the split region.
+ */
+sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
+ sc_rm_mr_t *mr_ret, sc_faddr_t addr_start,
+ sc_faddr_t addr_end);
+
+/*!
* This function frees a memory region.
*
* @param[in] ipc IPC handle
@@ -493,6 +552,32 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr);
/*!
+ * Internal SC function to find a memory region.
+ *
+ * @see sc_rm_find_memreg().
+ */
+/*!
+ * This function finds a memory region.
+ *
+ * @param[in] ipc IPC handle
+ * @param[out] mr return handle for region; used for
+ * subsequent function calls
+ * associated with this region
+ * @param[in] addr_start start address of region to search for
+ * @param[in] addr_end end address of region to search for
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_NOTFOUND if region not found,
+ *
+ * Searches only for regions owned by the caller. Finds first
+ * region containing the range specified.
+ */
+sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
+ sc_faddr_t addr_start, sc_faddr_t addr_end);
+
+/*!
* This function assigns ownership of a memory region.
*
* @param[in] ipc IPC handle
@@ -626,7 +711,20 @@ bool sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad);
/* @} */
+/*!
+ * @name Debug Functions
+ * @{
+ */
+
+/*!
+ * This function dumps the RM state for debug.
+ *
+ * @param[in] ipc IPC handle
+ */
+void sc_rm_dump(sc_ipc_t ipc);
+
+/* @} */
+
#endif /* _SC_RM_API_H */
/**@}*/
-
diff --git a/plat/freescale/common/include/sci/types.h b/plat/freescale/common/include/sci/types.h
index f1e6f638..c6dab07e 100644..100755
--- a/plat/freescale/common/include/sci/types.h
+++ b/plat/freescale/common/include/sci/types.h
@@ -22,58 +22,60 @@
* @name Defines for common frequencies
*/
/*@{*/
-#define SC_32KHZ 32768 /*!< 32KHz */
-#define SC_10MHZ 10000000 /*!< 10MHz */
-#define SC_20MHZ 20000000 /*!< 20MHz */
-#define SC_25MHZ 25000000 /*!< 25MHz */
-#define SC_40MHZ 40000000 /*!< 40MHz */
-#define SC_45MHZ 45000000 /*!< 45MHz */
-#define SC_50MHZ 50000000 /*!< 50MHz */
-#define SC_60MHZ 60000000 /*!< 60MHz */
-#define SC_66MHZ 66666666 /*!< 66MHz */
-#define SC_74MHZ 74250000 /*!< 74.25MHz */
-#define SC_80MHZ 80000000 /*!< 80MHz */
-#define SC_83MHZ 83333333 /*!< 83MHz */
-#define SC_84MHZ 84375000 /*!< 84.37MHz */
-#define SC_100MHZ 100000000 /*!< 100MHz */
-#define SC_125MHZ 125000000 /*!< 125MHz */
-#define SC_133MHZ 133333333 /*!< 133MHz */
-#define SC_135MHZ 135000000 /*!< 135MHz */
-#define SC_150MHZ 150000000 /*!< 150MHz */
-#define SC_160MHZ 160000000 /*!< 160MHz */
-#define SC_166MHZ 166666666 /*!< 160MHz */
-#define SC_175MHZ 175000000 /*!< 175MHz */
-#define SC_180MHZ 180000000 /*!< 180MHz */
-#define SC_200MHZ 200000000 /*!< 200MHz */
-#define SC_250MHZ 250000000 /*!< 250MHz */
-#define SC_266MHZ 266666666 /*!< 266MHz */
-#define SC_300MHZ 300000000 /*!< 300MHz */
-#define SC_320MHZ 320000000 /*!< 320MHz */
-#define SC_325MHZ 325000000 /*!< 325MHz */
-#define SC_333MHZ 333333333 /*!< 333MHz */
-#define SC_350MHZ 350000000 /*!< 350MHz */
-#define SC_375MHZ 375000000 /*!< 375MHz */
-#define SC_400MHZ 400000000 /*!< 400MHz */
-#define SC_500MHZ 500000000 /*!< 500MHz */
-#define SC_594MHZ 594000000 /*!< 594MHz */
-#define SC_650MHZ 650000000 /*!< 650MHz */
-#define SC_667MHZ 666666667 /*!< 667MHz */
-#define SC_675MHZ 675000000 /*!< 675MHz */
-#define SC_700MHZ 700000000 /*!< 700MHz */
-#define SC_720MHZ 720000000 /*!< 720MHz */
-#define SC_750MHZ 750000000 /*!< 750MHz */
-#define SC_800MHZ 800000000 /*!< 800MHz */
-#define SC_900MHZ 900000000 /*!< 900MHz */
-#define SC_1000MHZ 1000000000 /*!< 1GHz */
-#define SC_1056MHZ 1056000000 /*!< 1.056GHz */
-#define SC_1188MHZ 1188000000 /*!< 1.188GHz */
-#define SC_1300MHZ 1300000000 /*!< 1.3GHz */
-#define SC_1400MHZ 1400000000 /*!< 1.4GHz */
-#define SC_1500MHZ 1500000000 /*!< 1.5GHz */
-#define SC_1600MHZ 1600000000 /*!< 1.6GHz */
-#define SC_1800MHZ 1800000000 /*!< 1.8GHz */
-#define SC_2000MHZ 2000000000 /*!< 2.0GHz */
-#define SC_2112MHZ 2112000000 /*!< 2.12GHz */
+#define SC_32KHZ 32768 /* 32KHz */
+#define SC_10MHZ 10000000 /* 10MHz */
+#define SC_20MHZ 20000000 /* 20MHz */
+#define SC_25MHZ 25000000 /* 25MHz */
+#define SC_40MHZ 40000000 /* 40MHz */
+#define SC_45MHZ 45000000 /* 45MHz */
+#define SC_50MHZ 50000000 /* 50MHz */
+#define SC_60MHZ 60000000 /* 60MHz */
+#define SC_66MHZ 66666666 /* 66MHz */
+#define SC_74MHZ 74250000 /* 74.25MHz */
+#define SC_80MHZ 80000000 /* 80MHz */
+#define SC_83MHZ 83333333 /* 83MHz */
+#define SC_84MHZ 84375000 /* 84.37MHz */
+#define SC_100MHZ 100000000 /* 100MHz */
+#define SC_125MHZ 125000000 /* 125MHz */
+#define SC_133MHZ 133333333 /* 133MHz */
+#define SC_135MHZ 135000000 /* 135MHz */
+#define SC_150MHZ 150000000 /* 150MHz */
+#define SC_160MHZ 160000000 /* 160MHz */
+#define SC_166MHZ 166666666 /* 160MHz */
+#define SC_175MHZ 175000000 /* 175MHz */
+#define SC_180MHZ 180000000 /* 180MHz */
+#define SC_200MHZ 200000000 /* 200MHz */
+#define SC_250MHZ 250000000 /* 250MHz */
+#define SC_266MHZ 266666666 /* 266MHz */
+#define SC_300MHZ 300000000 /* 300MHz */
+#define SC_320MHZ 320000000 /* 320MHz */
+#define SC_325MHZ 325000000 /* 325MHz */
+#define SC_333MHZ 333333333 /* 333MHz */
+#define SC_350MHZ 350000000 /* 350MHz */
+#define SC_375MHZ 375000000 /* 375MHz */
+#define SC_400MHZ 400000000 /* 400MHz */
+#define SC_500MHZ 500000000 /* 500MHz */
+#define SC_594MHZ 594000000 /* 594MHz */
+#define SC_650MHZ 650000000 /* 650MHz */
+#define SC_667MHZ 666666667 /* 667MHz */
+#define SC_675MHZ 675000000 /* 675MHz */
+#define SC_700MHZ 700000000 /* 700MHz */
+#define SC_720MHZ 720000000 /* 720MHz */
+#define SC_750MHZ 750000000 /* 750MHz */
+#define SC_800MHZ 800000000 /* 800MHz */
+#define SC_850MHZ 850000000 /* 850MHz */
+#define SC_900MHZ 900000000 /* 900MHz */
+#define SC_1000MHZ 1000000000 /* 1GHz */
+#define SC_1056MHZ 1056000000 /* 1.056GHz */
+#define SC_1188MHZ 1188000000 /* 1.188GHz */
+#define SC_1260MHZ 1260000000 /* 1.26GHz */
+#define SC_1300MHZ 1300000000 /* 1.3GHz */
+#define SC_1400MHZ 1400000000 /* 1.4GHz */
+#define SC_1500MHZ 1500000000 /* 1.5GHz */
+#define SC_1600MHZ 1600000000 /* 1.6GHz */
+#define SC_1800MHZ 1800000000 /* 1.8GHz */
+#define SC_2000MHZ 2000000000 /* 2.0GHz */
+#define SC_2112MHZ 2112000000 /* 2.12GHz */
/*@}*/
@@ -81,50 +83,52 @@
* @name Defines for 24M related frequencies
*/
/*@{*/
-#define SC_12MHZ 12000000 /*!< 12MHz */
-#define SC_19MHZ 19800000 /*!< 19.8MHz */
-#define SC_24MHZ 24000000 /*!< 24MHz */
-#define SC_120MHZ 120000000 /*!< 120MHz */
-#define SC_132MHZ 132000000 /*!< 132MHz */
-#define SC_192MHZ 192000000 /*!< 192MHz */
-#define SC_211MHZ 211200000 /*!< 211.2MHz */
-#define SC_240MHZ 240000000 /*!< 240MHz */
-#define SC_264MHZ 264000000 /*!< 264MHz */
-#define SC_352MHZ 352000000 /*!< 352MHz */
-#define SC_360MHZ 360000000 /*!< 360MHz */
-#define SC_384MHZ 384000000 /*!< 384MHz */
-#define SC_396MHZ 396000000 /*!< 396MHz */
-#define SC_480MHZ 480000000 /*!< 480MHz */
-#define SC_600MHZ 600000000 /*!< 600MHz */
-#define SC_744MHZ 744000000 /*!< 744MHz */
-#define SC_792MHZ 792000000 /*!< 792MHz */
-#define SC_960MHZ 960000000 /*!< 960MHz */
-#define SC_1056MHZ 1056000000 /*!< 1056MHz */
-#define SC_1200MHZ 1200000000 /*!< 1.2GHz */
-#define SC_2400MHZ 2400000000 /*!< 2.4GHz */
+#define SC_8MHZ 8000000 /* 8MHz */
+#define SC_12MHZ 12000000 /* 12MHz */
+#define SC_19MHZ 19800000 /* 19.8MHz */
+#define SC_24MHZ 24000000 /* 24MHz */
+#define SC_120MHZ 120000000 /* 120MHz */
+#define SC_132MHZ 132000000 /* 132MHz */
+#define SC_192MHZ 192000000 /* 192MHz */
+#define SC_211MHZ 211200000 /* 211.2MHz */
+#define SC_240MHZ 240000000 /* 240MHz */
+#define SC_264MHZ 264000000 /* 264MHz */
+#define SC_352MHZ 352000000 /* 352MHz */
+#define SC_360MHZ 360000000 /* 360MHz */
+#define SC_384MHZ 384000000 /* 384MHz */
+#define SC_396MHZ 396000000 /* 396MHz */
+#define SC_480MHZ 480000000 /* 480MHz */
+#define SC_600MHZ 600000000 /* 600MHz */
+#define SC_744MHZ 744000000 /* 744MHz */
+#define SC_792MHZ 792000000 /* 792MHz */
+#define SC_960MHZ 960000000 /* 960MHz */
+#define SC_1056MHZ 1056000000 /* 1056MHz */
+#define SC_1200MHZ 1200000000 /* 1.2GHz */
+#define SC_1464MHZ 1464000000 /* 1.464GHz */
+#define SC_2400MHZ 2400000000 /* 2.4GHz */
/*@}*/
/*!
* @name Defines for A/V related frequencies
*/
/*@{*/
-#define SC_62MHZ 62937500 /*!< 62.9375MHz */
-#define SC_755MHZ 755250000 /*!< 755.25MHz */
+#define SC_62MHZ 62937500 /* 62.9375MHz */
+#define SC_755MHZ 755250000 /* 755.25MHz */
/*@}*/
/*!
* @name Defines for type widths
*/
/*@{*/
-#define SC_FADDR_W 36 /*!< Width of sc_faddr_t */
-#define SC_BOOL_W 1 /*!< Width of bool */
-#define SC_ERR_W 4 /*!< Width of sc_err_t */
-#define SC_RSRC_W 10 /*!< Width of sc_rsrc_t */
-#define SC_CTRL_W 6 /*!< Width of sc_ctrl_t */
+#define SC_FADDR_W 36 /* Width of sc_faddr_t */
+#define SC_BOOL_W 1 /* Width of bool */
+#define SC_ERR_W 4 /* Width of sc_err_t */
+#define SC_RSRC_W 10 /* Width of sc_rsrc_t */
+#define SC_CTRL_W 6 /* Width of sc_ctrl_t */
/*@}*/
-#define SC_R_ALL UINT16_MAX /*!< All resources */
-#define SC_P_ALL UINT16_MAX /*!< All pads */
+#define SC_R_ALL UINT16_MAX /* All resources */
+#define SC_P_ALL UINT16_MAX /* All pads */
/*!
* This type is used to store a system (full-size) address.
@@ -134,19 +138,19 @@ typedef uint64_t sc_faddr_t;
/*!
* This type is used to indicate error response for most functions.
*/
-typedef enum sc_err_e
-{
- SC_ERR_NONE = 0, /*!< Success */
- SC_ERR_VERSION = 1, /*!< Incompatible API version */
- SC_ERR_CONFIG = 2, /*!< Configuration error */
- SC_ERR_PARM = 3, /*!< Bad parameter */
- SC_ERR_NOACCESS = 4, /*!< Permission error (no access) */
- SC_ERR_LOCKED = 5, /*!< Permission error (locked) */
- SC_ERR_UNAVAILABLE = 6, /*!< Unavailable (out of resources) */
- SC_ERR_NOTFOUND = 7, /*!< Not found */
- SC_ERR_NOPOWER = 8, /*!< No power */
- SC_ERR_IPC = 9, /*!< Generic IPC error */
- SC_ERR_BUSY = 10, /*!< Resource is currently busy/active */
+typedef enum sc_err_e {
+ SC_ERR_NONE = 0, /* Success */
+ SC_ERR_VERSION = 1, /* Incompatible API version */
+ SC_ERR_CONFIG = 2, /* Configuration error */
+ SC_ERR_PARM = 3, /* Bad parameter */
+ SC_ERR_NOACCESS = 4, /* Permission error (no access) */
+ SC_ERR_LOCKED = 5, /* Permission error (locked) */
+ SC_ERR_UNAVAILABLE = 6, /* Unavailable (out of resources) */
+ SC_ERR_NOTFOUND = 7, /* Not found */
+ SC_ERR_NOPOWER = 8, /* No power */
+ SC_ERR_IPC = 9, /* Generic IPC error */
+ SC_ERR_BUSY = 10, /* Resource is currently busy/active */
+ SC_ERR_FAIL = 11, /* General I/O failure */
SC_ERR_LAST
} sc_err_t;
@@ -155,8 +159,7 @@ typedef enum sc_err_e
* and bus masters (but not memory regions). Note items from list should
* never be changed or removed (only added to at the end of the list).
*/
-typedef enum sc_rsrc_e
-{
+typedef enum sc_rsrc_e {
SC_R_A53 = 0,
SC_R_A53_0 = 1,
SC_R_A53_1 = 2,
@@ -681,14 +684,21 @@ typedef enum sc_rsrc_e
SC_R_PMIC_2 = 521,
SC_R_DBLOGIC = 522,
SC_R_HDMI_PLL_1 = 523,
+ SC_R_BOARD_R0 = 524,
+ SC_R_BOARD_R1 = 525,
+ SC_R_BOARD_R2 = 526,
+ SC_R_BOARD_R3 = 527,
+ SC_R_BOARD_R4 = 528,
+ SC_R_BOARD_R5 = 529,
+ SC_R_BOARD_R6 = 530,
+ SC_R_BOARD_R7 = 531,
SC_R_LAST
} sc_rsrc_t;
/*!
* This type is used to indicate a control.
*/
-typedef enum sc_ctrl_e
-{
+typedef enum sc_ctrl_e {
SC_C_TEMP = 0,
SC_C_TEMP_HI = 1,
@@ -729,6 +739,10 @@ typedef enum sc_ctrl_e
SC_C_DUAL_MODE = 36,
SC_C_VOLTAGE = 37,
SC_C_PXL_LINK_SEL = 38,
+ SC_C_OFS_SEL = 39,
+ SC_C_OFS_AUDIO = 40,
+ SC_C_OFS_PERIPH = 41,
+ SC_C_OFS_IRQ = 42,
SC_C_LAST
} sc_ctrl_t;
@@ -789,4 +803,3 @@ typedef uint16_t sc_pad_t;
#endif
#endif /* _SC_TYPES_H */
-
diff --git a/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c b/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c
index 4b0ef948..b5e79f1d 100644..100755
--- a/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c
+++ b/plat/freescale/common/sci/svc/pad/pad_rpc_clnt.c
@@ -7,7 +7,7 @@
/*!
* File containing client-side RPC functions for the PAD service. These
- * function are ported to clients that communicate to the SC.
+ * functions are ported to clients that communicate to the SC.
*
* @addtogroup PAD_SVC
* @{
@@ -50,7 +50,8 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad,
}
sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso)
+ uint8_t *mux, sc_pad_config_t *config,
+ sc_pad_iso_t *iso)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -110,8 +111,7 @@ sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl)
return (sc_err_t) result;
}
-sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t wakeup)
+sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -129,8 +129,7 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
return (sc_err_t) result;
}
-sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t *wakeup)
+sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t *wakeup)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -174,8 +173,8 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
}
sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux,
- sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl,
- sc_pad_wakeup_t *wakeup)
+ sc_pad_config_t *config, sc_pad_iso_t *iso,
+ uint32_t *ctrl, sc_pad_wakeup_t *wakeup)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -239,23 +238,19 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val)
return (sc_err_t) result;
}
-sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe,
- sc_pad_28lpp_ps_t ps)
+sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps)
{
sc_rpc_msg_t msg;
uint8_t result;
RPC_VER(&msg) = SC_RPC_VERSION;
RPC_SVC(&msg) = SC_RPC_SVC_PAD;
- RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28LPP;
+ RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI;
RPC_U16(&msg, 0) = pad;
RPC_U8(&msg, 2) = dse;
RPC_U8(&msg, 3) = ps;
- RPC_U8(&msg, 4) = sre;
- RPC_U8(&msg, 5) = hys;
- RPC_U8(&msg, 6) = pe;
- RPC_SIZE(&msg) = 3;
+ RPC_SIZE(&msg) = 2;
sc_call_rpc(ipc, &msg, false);
@@ -263,16 +258,16 @@ sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
return (sc_err_t) result;
}
-sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe,
- sc_pad_28lpp_ps_t *ps)
+sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t *dse,
+ sc_pad_28fdsoi_ps_t *ps)
{
sc_rpc_msg_t msg;
uint8_t result;
RPC_VER(&msg) = SC_RPC_VERSION;
RPC_SVC(&msg) = SC_RPC_SVC_PAD;
- RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28LPP;
+ RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI;
RPC_U16(&msg, 0) = pad;
RPC_SIZE(&msg) = 2;
@@ -283,28 +278,27 @@ sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
*dse = RPC_U8(&msg, 0);
if (ps != NULL)
*ps = RPC_U8(&msg, 1);
- if (sre != NULL)
- *sre = RPC_U8(&msg, 2);
- if (hys != NULL)
- *hys = RPC_U8(&msg, 3);
- if (pe != NULL)
- *pe = RPC_U8(&msg, 4);
return (sc_err_t) result;
}
-sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps)
+sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t dse, bool hys,
+ sc_pad_28fdsoi_pus_t pus, bool pke,
+ bool pue)
{
sc_rpc_msg_t msg;
uint8_t result;
RPC_VER(&msg) = SC_RPC_VERSION;
RPC_SVC(&msg) = SC_RPC_SVC_PAD;
- RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI;
+ RPC_FUNC(&msg) = PAD_FUNC_SET_GP_28FDSOI_HSIC;
RPC_U16(&msg, 0) = pad;
RPC_U8(&msg, 2) = dse;
- RPC_U8(&msg, 3) = ps;
- RPC_SIZE(&msg) = 2;
+ RPC_U8(&msg, 3) = pus;
+ RPC_U8(&msg, 4) = hys;
+ RPC_U8(&msg, 5) = pke;
+ RPC_U8(&msg, 6) = pue;
+ RPC_SIZE(&msg) = 3;
sc_call_rpc(ipc, &msg, false);
@@ -312,15 +306,17 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
return (sc_err_t) result;
}
-sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps)
+sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+ sc_pad_28fdsoi_dse_t *dse, bool *hys,
+ sc_pad_28fdsoi_pus_t * pus, bool *pke,
+ bool *pue)
{
sc_rpc_msg_t msg;
uint8_t result;
RPC_VER(&msg) = SC_RPC_VERSION;
RPC_SVC(&msg) = SC_RPC_SVC_PAD;
- RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI;
+ RPC_FUNC(&msg) = PAD_FUNC_GET_GP_28FDSOI_HSIC;
RPC_U16(&msg, 0) = pad;
RPC_SIZE(&msg) = 2;
@@ -329,14 +325,21 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
result = RPC_R8(&msg);
if (dse != NULL)
*dse = RPC_U8(&msg, 0);
- if (ps != NULL)
- *ps = RPC_U8(&msg, 1);
+ if (pus != NULL)
+ *pus = RPC_U8(&msg, 1);
+ if (hys != NULL)
+ *hys = RPC_U8(&msg, 2);
+ if (pke != NULL)
+ *pke = RPC_U8(&msg, 3);
+ if (pue != NULL)
+ *pue = RPC_U8(&msg, 4);
return (sc_err_t) result;
}
sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn,
- bool nasrc_sel)
+ uint8_t compen, bool fastfrz,
+ uint8_t rasrcp, uint8_t rasrcn,
+ bool nasrc_sel, bool psw_ovr)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -350,6 +353,7 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
RPC_U8(&msg, 4) = rasrcn;
RPC_U8(&msg, 5) = fastfrz;
RPC_U8(&msg, 6) = nasrc_sel;
+ RPC_U8(&msg, 7) = psw_ovr;
RPC_SIZE(&msg) = 3;
sc_call_rpc(ipc, &msg, false);
@@ -359,8 +363,10 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
}
sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn,
- bool *nasrc_sel, bool *compok, uint8_t *nasrc)
+ uint8_t *compen, bool *fastfrz,
+ uint8_t *rasrcp, uint8_t *rasrcn,
+ bool *nasrc_sel, bool *compok,
+ uint8_t *nasrc, bool *psw_ovr)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -388,8 +394,9 @@ sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
*nasrc_sel = RPC_U8(&msg, 5);
if (compok != NULL)
*compok = RPC_U8(&msg, 6);
+ if (psw_ovr != NULL)
+ *psw_ovr = RPC_U8(&msg, 7);
return (sc_err_t) result;
}
/**@}*/
-
diff --git a/plat/freescale/common/sci/svc/pad/rpc.h b/plat/freescale/common/sci/svc/pad/rpc.h
index f0f32aff..c86b295a 100644..100755
--- a/plat/freescale/common/sci/svc/pad/rpc.h
+++ b/plat/freescale/common/sci/svc/pad/rpc.h
@@ -24,25 +24,24 @@
/*!
* This type is used to indicate RPC PAD function calls.
*/
-typedef enum pad_func_e
-{
- PAD_FUNC_UNKNOWN = 0, /*!< Unknown function */
- PAD_FUNC_SET_MUX = 1, /*!< Index for pad_set_mux() RPC call */
- PAD_FUNC_GET_MUX = 6, /*!< Index for pad_get_mux() RPC call */
- PAD_FUNC_SET_GP = 2, /*!< Index for pad_set_gp() RPC call */
- PAD_FUNC_GET_GP = 7, /*!< Index for pad_get_gp() RPC call */
- PAD_FUNC_SET_WAKEUP = 4, /*!< Index for pad_set_wakeup() RPC call */
- PAD_FUNC_GET_WAKEUP = 9, /*!< Index for pad_get_wakeup() RPC call */
- PAD_FUNC_SET_ALL = 5, /*!< Index for pad_set_all() RPC call */
- PAD_FUNC_GET_ALL = 10, /*!< Index for pad_get_all() RPC call */
- PAD_FUNC_SET = 15, /*!< Index for pad_set() RPC call */
- PAD_FUNC_GET = 16, /*!< Index for pad_get() RPC call */
- PAD_FUNC_SET_GP_28LPP = 3, /*!< Index for pad_set_gp_28lpp() RPC call */
- PAD_FUNC_GET_GP_28LPP = 8, /*!< Index for pad_get_gp_28lpp() RPC call */
- PAD_FUNC_SET_GP_28FDSOI = 11, /*!< Index for pad_set_gp_28fdsoi() RPC call */
- PAD_FUNC_GET_GP_28FDSOI = 12, /*!< Index for pad_get_gp_28fdsoi() RPC call */
- PAD_FUNC_SET_GP_28FDSOI_COMP = 13, /*!< Index for pad_set_gp_28fdsoi_comp() RPC call */
- PAD_FUNC_GET_GP_28FDSOI_COMP = 14, /*!< Index for pad_get_gp_28fdsoi_comp() RPC call */
+typedef enum pad_func_e {
+ PAD_FUNC_UNKNOWN = 0, /* Unknown function */
+ PAD_FUNC_SET_MUX = 1, /* Index for pad_set_mux() RPC call */
+ PAD_FUNC_GET_MUX = 6, /* Index for pad_get_mux() RPC call */
+ PAD_FUNC_SET_GP = 2, /* Index for pad_set_gp() RPC call */
+ PAD_FUNC_GET_GP = 7, /* Index for pad_get_gp() RPC call */
+ PAD_FUNC_SET_WAKEUP = 4, /* Index for pad_set_wakeup() RPC call */
+ PAD_FUNC_GET_WAKEUP = 9, /* Index for pad_get_wakeup() RPC call */
+ PAD_FUNC_SET_ALL = 5, /* Index for pad_set_all() RPC call */
+ PAD_FUNC_GET_ALL = 10, /* Index for pad_get_all() RPC call */
+ PAD_FUNC_SET = 15, /* Index for pad_set() RPC call */
+ PAD_FUNC_GET = 16, /* Index for pad_get() RPC call */
+ PAD_FUNC_SET_GP_28FDSOI = 11, /* Index for pad_set_gp_28fdsoi() RPC call */
+ PAD_FUNC_GET_GP_28FDSOI = 12, /* Index for pad_get_gp_28fdsoi() RPC call */
+ PAD_FUNC_SET_GP_28FDSOI_HSIC = 3, /* Index for pad_set_gp_28fdsoi_hsic() RPC call */
+ PAD_FUNC_GET_GP_28FDSOI_HSIC = 8, /* Index for pad_get_gp_28fdsoi_hsic() RPC call */
+ PAD_FUNC_SET_GP_28FDSOI_COMP = 13, /* Index for pad_set_gp_28fdsoi_comp() RPC call */
+ PAD_FUNC_GET_GP_28FDSOI_COMP = 14, /* Index for pad_get_gp_28fdsoi_comp() RPC call */
} pad_func_t;
/* Functions */
diff --git a/plat/freescale/common/sci/svc/pm/rpc.h b/plat/freescale/common/sci/svc/pm/rpc.h
index 1f4235a2..cbed56ab 100644..100755
--- a/plat/freescale/common/sci/svc/pm/rpc.h
+++ b/plat/freescale/common/sci/svc/pm/rpc.h
@@ -24,24 +24,23 @@
/*!
* This type is used to indicate RPC PM function calls.
*/
-typedef enum pm_func_e
-{
- PM_FUNC_UNKNOWN = 0, /*!< Unknown function */
- PM_FUNC_SET_SYS_POWER_MODE = 1, /*!< Index for pm_set_sys_power_mode() RPC call */
- PM_FUNC_GET_SYS_POWER_MODE = 2, /*!< Index for pm_get_sys_power_mode() RPC call */
- PM_FUNC_SET_RESOURCE_POWER_MODE = 3, /*!< Index for pm_set_resource_power_mode() RPC call */
- PM_FUNC_GET_RESOURCE_POWER_MODE = 4, /*!< Index for pm_get_resource_power_mode() RPC call */
- PM_FUNC_SET_CLOCK_RATE = 5, /*!< Index for pm_set_clock_rate() RPC call */
- PM_FUNC_GET_CLOCK_RATE = 6, /*!< Index for pm_get_clock_rate() RPC call */
- PM_FUNC_CLOCK_ENABLE = 7, /*!< Index for pm_clock_enable() RPC call */
- PM_FUNC_SET_CLOCK_PARENT = 14, /*!< Index for pm_set_clock_parent() RPC call */
- PM_FUNC_GET_CLOCK_PARENT = 15, /*!< Index for pm_get_clock_parent() RPC call */
- PM_FUNC_RESET = 13, /*!< Index for pm_reset() RPC call */
- PM_FUNC_RESET_REASON = 10, /*!< Index for pm_reset_reason() RPC call */
- PM_FUNC_BOOT = 8, /*!< Index for pm_boot() RPC call */
- PM_FUNC_REBOOT = 9, /*!< Index for pm_reboot() RPC call */
- PM_FUNC_REBOOT_PARTITION = 12, /*!< Index for pm_reboot_partition() RPC call */
- PM_FUNC_CPU_START = 11, /*!< Index for pm_cpu_start() RPC call */
+typedef enum pm_func_e {
+ PM_FUNC_UNKNOWN = 0, /* Unknown function */
+ PM_FUNC_SET_SYS_POWER_MODE = 1, /* Index for pm_set_sys_power_mode() RPC call */
+ PM_FUNC_GET_SYS_POWER_MODE = 2, /* Index for pm_get_sys_power_mode() RPC call */
+ PM_FUNC_SET_RESOURCE_POWER_MODE = 3, /* Index for pm_set_resource_power_mode() RPC call */
+ PM_FUNC_GET_RESOURCE_POWER_MODE = 4, /* Index for pm_get_resource_power_mode() RPC call */
+ PM_FUNC_SET_CLOCK_RATE = 5, /* Index for pm_set_clock_rate() RPC call */
+ PM_FUNC_GET_CLOCK_RATE = 6, /* Index for pm_get_clock_rate() RPC call */
+ PM_FUNC_CLOCK_ENABLE = 7, /* Index for pm_clock_enable() RPC call */
+ PM_FUNC_SET_CLOCK_PARENT = 14, /* Index for pm_set_clock_parent() RPC call */
+ PM_FUNC_GET_CLOCK_PARENT = 15, /* Index for pm_get_clock_parent() RPC call */
+ PM_FUNC_RESET = 13, /* Index for pm_reset() RPC call */
+ PM_FUNC_RESET_REASON = 10, /* Index for pm_reset_reason() RPC call */
+ PM_FUNC_BOOT = 8, /* Index for pm_boot() RPC call */
+ PM_FUNC_REBOOT = 9, /* Index for pm_reboot() RPC call */
+ PM_FUNC_REBOOT_PARTITION = 12, /* Index for pm_reboot_partition() RPC call */
+ PM_FUNC_CPU_START = 11, /* Index for pm_cpu_start() RPC call */
} pm_func_t;
/* Functions */
diff --git a/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c b/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c
index 9cdf6177..454d07bb 100644..100755
--- a/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c
+++ b/plat/freescale/common/sci/svc/rm/rm_rpc_clnt.c
@@ -7,7 +7,7 @@
/*!
* File containing client-side RPC functions for the RM service. These
- * function are ported to clients that communicate to the SC.
+ * functions are ported to clients that communicate to the SC.
*
* @addtogroup RM_SVC
* @{
@@ -28,7 +28,8 @@
/* Local Functions */
sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure,
- bool isolated, bool restricted, bool confidential, bool coherent)
+ bool isolated, bool restricted,
+ bool confidential, bool coherent)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -84,8 +85,7 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc)
return (sc_rm_did_t) result;
}
-sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_did_t did)
+sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -138,8 +138,7 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt)
return (sc_err_t)result;
}
-sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_pt_t pt_parent)
+sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -178,8 +177,7 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
return (sc_err_t)result;
}
-sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rsrc_t resource)
+sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -217,8 +215,28 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
return (sc_err_t)result;
}
+sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource,
+ bool movable)
+{
+ sc_rpc_msg_t msg;
+ uint8_t result;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SVC(&msg) = SC_RPC_SVC_RM;
+ RPC_FUNC(&msg) = RM_FUNC_SET_SUBSYS_RSRC_MOVABLE;
+ RPC_U16(&msg, 0) = resource;
+ RPC_U8(&msg, 2) = movable;
+ RPC_SIZE(&msg) = 2;
+
+ sc_call_rpc(ipc, &msg, false);
+
+ result = RPC_R8(&msg);
+ return (sc_err_t)result;
+}
+
sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_spa_t sa, sc_rm_spa_t pa, bool smmu_bypass)
+ sc_rm_spa_t sa, sc_rm_spa_t pa,
+ bool smmu_bypass)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -238,8 +256,7 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
return (sc_err_t)result;
}
-sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_sid_t sid)
+sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid)
{
sc_rpc_msg_t msg;
uint8_t result;
@@ -371,6 +388,31 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
return (sc_err_t)result;
}
+sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
+ sc_rm_mr_t *mr_ret, sc_faddr_t addr_start,
+ sc_faddr_t addr_end)
+{
+ sc_rpc_msg_t msg;
+ uint8_t result;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SVC(&msg) = SC_RPC_SVC_RM;
+ RPC_FUNC(&msg) = RM_FUNC_MEMREG_SPLIT;
+ RPC_U32(&msg, 0) = addr_start >> 32;
+ RPC_U32(&msg, 4) = addr_start;
+ RPC_U32(&msg, 8) = addr_end >> 32;
+ RPC_U32(&msg, 12) = addr_end;
+ RPC_U8(&msg, 16) = mr;
+ RPC_SIZE(&msg) = 6;
+
+ sc_call_rpc(ipc, &msg, false);
+
+ result = RPC_R8(&msg);
+ if (mr_ret != NULL)
+ *mr_ret = RPC_U8(&msg, 0);
+ return (sc_err_t)result;
+}
+
sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr)
{
sc_rpc_msg_t msg;
@@ -388,6 +430,29 @@ sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr)
return (sc_err_t)result;
}
+sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
+ sc_faddr_t addr_start, sc_faddr_t addr_end)
+{
+ sc_rpc_msg_t msg;
+ uint8_t result;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SVC(&msg) = SC_RPC_SVC_RM;
+ RPC_FUNC(&msg) = RM_FUNC_FIND_MEMREG;
+ RPC_U32(&msg, 0) = addr_start >> 32;
+ RPC_U32(&msg, 4) = addr_start;
+ RPC_U32(&msg, 8) = addr_end >> 32;
+ RPC_U32(&msg, 12) = addr_end;
+ RPC_SIZE(&msg) = 5;
+
+ sc_call_rpc(ipc, &msg, false);
+
+ result = RPC_R8(&msg);
+ if (mr != NULL)
+ *mr = RPC_U8(&msg, 0);
+ return (sc_err_t)result;
+}
+
sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr)
{
sc_rpc_msg_t msg;
@@ -458,9 +523,11 @@ sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr,
sc_call_rpc(ipc, &msg, false);
if (addr_start != NULL)
- *addr_start = ((uint64_t) RPC_U32(&msg, 0) << 32) | RPC_U32(&msg, 4);
+ *addr_start =
+ ((uint64_t) RPC_U32(&msg, 0) << 32) | RPC_U32(&msg, 4);
if (addr_end != NULL)
- *addr_end = ((uint64_t) RPC_U32(&msg, 8) << 32) | RPC_U32(&msg, 12);
+ *addr_end =
+ ((uint64_t) RPC_U32(&msg, 8) << 32) | RPC_U32(&msg, 12);
result = RPC_R8(&msg);
return (sc_err_t)result;
}
@@ -520,5 +587,18 @@ bool sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad)
return (bool)result;
}
-/**@}*/
+void sc_rm_dump(sc_ipc_t ipc)
+{
+ sc_rpc_msg_t msg;
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SVC(&msg) = SC_RPC_SVC_RM;
+ RPC_FUNC(&msg) = RM_FUNC_DUMP;
+ RPC_SIZE(&msg) = 1;
+
+ sc_call_rpc(ipc, &msg, false);
+
+ return;
+}
+
+/**@}*/
diff --git a/plat/freescale/common/sci/svc/rm/rpc.h b/plat/freescale/common/sci/svc/rm/rpc.h
index 68037470..2a911874 100644..100755
--- a/plat/freescale/common/sci/svc/rm/rpc.h
+++ b/plat/freescale/common/sci/svc/rm/rpc.h
@@ -24,35 +24,38 @@
/*!
* This type is used to indicate RPC RM function calls.
*/
-typedef enum rm_func_e
-{
- RM_FUNC_UNKNOWN = 0, /*!< Unknown function */
- RM_FUNC_PARTITION_ALLOC = 1, /*!< Index for rm_partition_alloc() RPC call */
- RM_FUNC_PARTITION_FREE = 2, /*!< Index for rm_partition_free() RPC call */
- RM_FUNC_GET_DID = 26, /*!< Index for rm_get_did() RPC call */
- RM_FUNC_PARTITION_STATIC = 3, /*!< Index for rm_partition_static() RPC call */
- RM_FUNC_PARTITION_LOCK = 4, /*!< Index for rm_partition_lock() RPC call */
- RM_FUNC_GET_PARTITION = 5, /*!< Index for rm_get_partition() RPC call */
- RM_FUNC_SET_PARENT = 6, /*!< Index for rm_set_parent() RPC call */
- RM_FUNC_MOVE_ALL = 7, /*!< Index for rm_move_all() RPC call */
- RM_FUNC_ASSIGN_RESOURCE = 8, /*!< Index for rm_assign_resource() RPC call */
- RM_FUNC_SET_RESOURCE_MOVABLE = 9, /*!< Index for rm_set_resource_movable() RPC call */
- RM_FUNC_SET_MASTER_ATTRIBUTES = 10, /*!< Index for rm_set_master_attributes() RPC call */
- RM_FUNC_SET_MASTER_SID = 11, /*!< Index for rm_set_master_sid() RPC call */
- RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12, /*!< Index for rm_set_peripheral_permissions() RPC call */
- RM_FUNC_IS_RESOURCE_OWNED = 13, /*!< Index for rm_is_resource_owned() RPC call */
- RM_FUNC_IS_RESOURCE_MASTER = 14, /*!< Index for rm_is_resource_master() RPC call */
- RM_FUNC_IS_RESOURCE_PERIPHERAL = 15, /*!< Index for rm_is_resource_peripheral() RPC call */
- RM_FUNC_GET_RESOURCE_INFO = 16, /*!< Index for rm_get_resource_info() RPC call */
- RM_FUNC_MEMREG_ALLOC = 17, /*!< Index for rm_memreg_alloc() RPC call */
- RM_FUNC_MEMREG_FREE = 18, /*!< Index for rm_memreg_free() RPC call */
- RM_FUNC_ASSIGN_MEMREG = 19, /*!< Index for rm_assign_memreg() RPC call */
- RM_FUNC_SET_MEMREG_PERMISSIONS = 20, /*!< Index for rm_set_memreg_permissions() RPC call */
- RM_FUNC_IS_MEMREG_OWNED = 21, /*!< Index for rm_is_memreg_owned() RPC call */
- RM_FUNC_GET_MEMREG_INFO = 22, /*!< Index for rm_get_memreg_info() RPC call */
- RM_FUNC_ASSIGN_PAD = 23, /*!< Index for rm_assign_pad() RPC call */
- RM_FUNC_SET_PAD_MOVABLE = 24, /*!< Index for rm_set_pad_movable() RPC call */
- RM_FUNC_IS_PAD_OWNED = 25, /*!< Index for rm_is_pad_owned() RPC call */
+typedef enum rm_func_e {
+ RM_FUNC_UNKNOWN = 0, /* Unknown function */
+ RM_FUNC_PARTITION_ALLOC = 1, /* Index for rm_partition_alloc() RPC call */
+ RM_FUNC_PARTITION_FREE = 2, /* Index for rm_partition_free() RPC call */
+ RM_FUNC_GET_DID = 26, /* Index for rm_get_did() RPC call */
+ RM_FUNC_PARTITION_STATIC = 3, /* Index for rm_partition_static() RPC call */
+ RM_FUNC_PARTITION_LOCK = 4, /* Index for rm_partition_lock() RPC call */
+ RM_FUNC_GET_PARTITION = 5, /* Index for rm_get_partition() RPC call */
+ RM_FUNC_SET_PARENT = 6, /* Index for rm_set_parent() RPC call */
+ RM_FUNC_MOVE_ALL = 7, /* Index for rm_move_all() RPC call */
+ RM_FUNC_ASSIGN_RESOURCE = 8, /* Index for rm_assign_resource() RPC call */
+ RM_FUNC_SET_RESOURCE_MOVABLE = 9, /* Index for rm_set_resource_movable() RPC call */
+ RM_FUNC_SET_SUBSYS_RSRC_MOVABLE = 28, /* Index for rm_set_subsys_rsrc_movable() RPC call */
+ RM_FUNC_SET_MASTER_ATTRIBUTES = 10, /* Index for rm_set_master_attributes() RPC call */
+ RM_FUNC_SET_MASTER_SID = 11, /* Index for rm_set_master_sid() RPC call */
+ RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12, /* Index for rm_set_peripheral_permissions() RPC call */
+ RM_FUNC_IS_RESOURCE_OWNED = 13, /* Index for rm_is_resource_owned() RPC call */
+ RM_FUNC_IS_RESOURCE_MASTER = 14, /* Index for rm_is_resource_master() RPC call */
+ RM_FUNC_IS_RESOURCE_PERIPHERAL = 15, /* Index for rm_is_resource_peripheral() RPC call */
+ RM_FUNC_GET_RESOURCE_INFO = 16, /* Index for rm_get_resource_info() RPC call */
+ RM_FUNC_MEMREG_ALLOC = 17, /* Index for rm_memreg_alloc() RPC call */
+ RM_FUNC_MEMREG_SPLIT = 29, /* Index for rm_memreg_split() RPC call */
+ RM_FUNC_MEMREG_FREE = 18, /* Index for rm_memreg_free() RPC call */
+ RM_FUNC_FIND_MEMREG = 30, /* Index for rm_find_memreg() RPC call */
+ RM_FUNC_ASSIGN_MEMREG = 19, /* Index for rm_assign_memreg() RPC call */
+ RM_FUNC_SET_MEMREG_PERMISSIONS = 20, /* Index for rm_set_memreg_permissions() RPC call */
+ RM_FUNC_IS_MEMREG_OWNED = 21, /* Index for rm_is_memreg_owned() RPC call */
+ RM_FUNC_GET_MEMREG_INFO = 22, /* Index for rm_get_memreg_info() RPC call */
+ RM_FUNC_ASSIGN_PAD = 23, /* Index for rm_assign_pad() RPC call */
+ RM_FUNC_SET_PAD_MOVABLE = 24, /* Index for rm_set_pad_movable() RPC call */
+ RM_FUNC_IS_PAD_OWNED = 25, /* Index for rm_is_pad_owned() RPC call */
+ RM_FUNC_DUMP = 27, /* Index for rm_dump() RPC call */
} rm_func_t;
/* Functions */
@@ -76,4 +79,3 @@ void rm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg);
#endif /* _SC_RM_RPC_H */
/**@}*/
-