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authorJacky Bai <ping.bai@nxp.com>2020-04-03 17:25:54 +0800
committerJacky Bai <ping.bai@nxp.com>2020-04-03 18:31:39 +0800
commit3511e46772a04136bbec67267360304c701edc6a (patch)
tree9addcbfb62f61757df4bbe03d792867f11dde233
parentffa4343ec424f1eacf86b4412e8ff5a6c01dc37b (diff)
MLK-23743 plat: imx8mp: Correct the IMRs number
The number of IMRs for each core is 5, so correct it and replace with a macro. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
-rw-r--r--plat/imx/imx8m/imx8mp/gpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/plat/imx/imx8m/imx8mp/gpc.c b/plat/imx/imx8m/imx8mp/gpc.c
index c1f489a6..08a1a82b 100644
--- a/plat/imx/imx8m/imx8mp/gpc.c
+++ b/plat/imx/imx8m/imx8mp/gpc.c
@@ -29,7 +29,7 @@
#define FSL_SIP_CONFIG_GPC_SET_AFF 0x04
#define FSL_SIP_CONFIG_GPC_CORE_WAKE 0x05
-
+#define IMR_NUM U(5)
#define CCGR(x) (0x4000 + (x) * 16)
struct imx_noc_setting {
@@ -535,7 +535,7 @@ void imx_gpc_init(void)
int i;
/* mask all the wakeup irq by default */
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < IMR_NUM; i++) {
mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_A53 + i * 4, ~0x0);
mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0);
mmio_write_32(IMX_GPC_BASE + IMR1_CORE2_A53 + i * 4, ~0x0);