diff options
author | Jacky Bai <ping.bai@nxp.com> | 2020-04-16 14:48:06 +0800 |
---|---|---|
committer | Jacky Bai <ping.bai@nxp.com> | 2020-04-23 20:26:45 +0800 |
commit | ee6e0f2781f2ab43b3eb5b66f7a6100f1a3a8450 (patch) | |
tree | 1d94141bb138ddf91609101bbf97c586fac8b72c | |
parent | a1b1945ac5a44c3fa66b708c48943e04749efb04 (diff) |
MLK-23798 plat: imx8mp: Update the noc power down flow of imx8mp
When system entering DSM mode, the main NOC wrapper only need to
be on if any of the MIX with ADB400 port is on, so update the flow
for this.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
-rw-r--r-- | plat/imx/imx8m/gpc_common.c | 2 | ||||
-rw-r--r-- | plat/imx/imx8m/imx8mp/gpc.c | 6 | ||||
-rw-r--r-- | plat/imx/imx8m/imx8mp/include/gpc_reg.h | 4 |
3 files changed, 7 insertions, 5 deletions
diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c index 400341ce..7a8837ef 100644 --- a/plat/imx/imx8m/gpc_common.c +++ b/plat/imx/imx8m/gpc_common.c @@ -241,7 +241,7 @@ void imx_noc_slot_config(bool pdn) mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(1), NOC_PDN_SLT_CTRL); mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(2), NOC_PUP_SLT_CTRL); /* clear a53's PDN ack, use NOC's PDN ack */ - mmio_clrsetbits_32(IMX_GPC_BASE + PGC_ACK_SEL_A53, 0xffff, NOC_PGC_PDN_ACK); + mmio_clrsetbits_32(IMX_GPC_BASE + PGC_ACK_SEL_A53, A53_PLAT_PDN_ACK, NOC_PGC_PDN_ACK); mmio_setbits_32(IMX_GPC_BASE + NOC_PGC_PCR, 0x1); } else { mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(1), NOC_PDN_SLT_CTRL); diff --git a/plat/imx/imx8m/imx8mp/gpc.c b/plat/imx/imx8m/imx8mp/gpc.c index 08a1a82b..4556b80c 100644 --- a/plat/imx/imx8m/imx8mp/gpc.c +++ b/plat/imx/imx8m/imx8mp/gpc.c @@ -351,7 +351,8 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) } if (on) { - pu_domain_status |= (1 << domain_id); + if (pwr_domain->need_sync) + pu_domain_status |= (1 << domain_id); if (domain_id == HDMIMIX) { /* assert the reset */ @@ -404,7 +405,8 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) if (domain_id == AUDIOMIX) imx_aips5_init(); } else { - pu_domain_status &= ~(1 << domain_id); + if (pwr_domain->need_sync) + pu_domain_status &= ~(1 << domain_id); /* handle the ADB400 sync */ if (!pwr_domain->init_on && pwr_domain->need_sync) { diff --git a/plat/imx/imx8m/imx8mp/include/gpc_reg.h b/plat/imx/imx8m/imx8mp/include/gpc_reg.h index 70a895d6..66e4b920 100644 --- a/plat/imx/imx8m/imx8mp/include/gpc_reg.h +++ b/plat/imx/imx8m/imx8mp/include/gpc_reg.h @@ -70,8 +70,8 @@ #define NOC_PDN_SLT_CTRL BIT(12) #define NOC_PUP_SLT_CTRL BIT(13) -#define NOC_PGC_PDN_ACK BIT(8) -#define NOC_PGC_PUP_ACK BIT(19) +#define NOC_PGC_PDN_ACK BIT(12) +#define NOC_PGC_PUP_ACK BIT(13) #define PLAT_PUP_SLT_CTRL BIT(9) #define PLAT_PDN_SLT_CTRL BIT(8) |