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author | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-03-21 07:20:09 +0000 |
---|---|---|
committer | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-04-07 10:12:21 +0800 |
commit | 7d173fc594d7d50c02e180c56c59ca1d3e51152e (patch) | |
tree | 8c04f896f7a0569bd7ba7a4baa0368c6be18f9b9 /Makefile | |
parent | 93883a293145f6c85b3fc8c219f400e28b7d1491 (diff) |
Add support for BL2 in XIP memory
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -373,6 +373,11 @@ ifneq ($(MULTI_CONSOLE_API), 0) endif endif +#For now, BL2_IN_XIP_MEM is only supported when BL2_AT_EL3 is 1. +ifeq ($(BL2_AT_EL3)-$(BL2_IN_XIP_MEM),0-1) +$(error "BL2_IN_XIP_MEM is only supported when BL2_AT_EL3 is enabled") +endif + ################################################################################ # Process platform overrideable behaviour ################################################################################ @@ -518,6 +523,7 @@ $(eval $(call assert_boolean,USE_COHERENT_MEM)) $(eval $(call assert_boolean,USE_TBBR_DEFS)) $(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY)) $(eval $(call assert_boolean,BL2_AT_EL3)) +$(eval $(call assert_boolean,BL2_IN_XIP_MEM)) $(eval $(call assert_numeric,ARM_ARCH_MAJOR)) $(eval $(call assert_numeric,ARM_ARCH_MINOR)) @@ -564,6 +570,7 @@ $(eval $(call add_define,USE_COHERENT_MEM)) $(eval $(call add_define,USE_TBBR_DEFS)) $(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY)) $(eval $(call add_define,BL2_AT_EL3)) +$(eval $(call add_define,BL2_IN_XIP_MEM)) # Define the EL3_PAYLOAD_BASE flag only if it is provided. ifdef EL3_PAYLOAD_BASE |