diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2019-09-12 11:11:34 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-12 11:11:34 +0000 |
| commit | f38e5182f7e60d8c193cbf7712982c0ed7f47cdb (patch) | |
| tree | afa29cef48c483d60aa4252ba5c41403682689ad /drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h | |
| parent | 9af73b36883010a4dc4f0b0640dcc7dced895770 (diff) | |
| parent | fbee88fbb039c2d2a5f5c78fac74a1942146de95 (diff) | |
Merge changes I072c0f61,I798401f4,I9648ef55,I7225d9fa,Ife682288, ... into integration
* changes:
rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3N
rcar_gen3: drivers: qos: update QoS setting
rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headers
rcar_gen3: drivers: ddr_b: Fix line-over-80s
rcar_gen3: drivers: ddr_b: Further checkpatch cleanups
rcar_gen3: drivers: ddr_b: Clean up camel case
rcar_get3: drivers: ddr_b: Basic checkpatch fixes
rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B
rcar_get3: drivers: ddr: Clean up common code
Diffstat (limited to 'drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h')
| -rw-r--r-- | drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h b/drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h index cd820e85..2ab14dad 100644 --- a/drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h +++ b/drivers/renesas/rcar/qos/M3/qos_init_m3_v30_mstat195.h @@ -32,8 +32,8 @@ static uint64_t mstat_fix[] = { /* 0x00c0, */ 0x000C04020000FFFFUL, /* 0x00c8, */ 0x000C04010000FFFFUL, /* 0x00d0, */ 0x000C04010000FFFFUL, - /* 0x00d8, */ 0x000C100D0000FFFFUL, - /* 0x00e0, */ 0x000C1C1B0000FFFFUL, + /* 0x00d8, */ 0x000C08050000FFFFUL, + /* 0x00e0, */ 0x000C10100000FFFFUL, /* 0x00e8, */ 0x0000000000000000UL, /* 0x00f0, */ 0x001024090000FFFFUL, /* 0x00f8, */ 0x0000000000000000UL, @@ -41,7 +41,7 @@ static uint64_t mstat_fix[] = { /* 0x0108, */ 0x0000000000000000UL, /* 0x0110, */ 0x00100C090000FFFFUL, /* 0x0118, */ 0x0000000000000000UL, - /* 0x0120, */ 0x000C1C1B0000FFFFUL, + /* 0x0120, */ 0x000C10100000FFFFUL, /* 0x0128, */ 0x0000000000000000UL, /* 0x0130, */ 0x0000000000000000UL, /* 0x0138, */ 0x00100C0B0000FFFFUL, |