diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2019-09-12 11:11:34 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-12 11:11:34 +0000 |
| commit | f38e5182f7e60d8c193cbf7712982c0ed7f47cdb (patch) | |
| tree | afa29cef48c483d60aa4252ba5c41403682689ad /drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h | |
| parent | 9af73b36883010a4dc4f0b0640dcc7dced895770 (diff) | |
| parent | fbee88fbb039c2d2a5f5c78fac74a1942146de95 (diff) | |
Merge changes I072c0f61,I798401f4,I9648ef55,I7225d9fa,Ife682288, ... into integration
* changes:
rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3N
rcar_gen3: drivers: qos: update QoS setting
rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headers
rcar_gen3: drivers: ddr_b: Fix line-over-80s
rcar_gen3: drivers: ddr_b: Further checkpatch cleanups
rcar_gen3: drivers: ddr_b: Clean up camel case
rcar_get3: drivers: ddr_b: Basic checkpatch fixes
rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B
rcar_get3: drivers: ddr: Clean up common code
Diffstat (limited to 'drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h')
| -rw-r--r-- | drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h b/drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h index bad1de90..adf8dab1 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h +++ b/drivers/staging/renesas/rcar/ddr/ddr_b/ddr_regdef.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2018-2019, Renesas Electronics Corporation. + * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -1178,9 +1179,9 @@ #define _reg_PI_TSDO_F1 0x00000493U #define _reg_PI_TSDO_F2 0x00000494U -#define DDR_REGDEF_ADR(regdef) ((regdef)&0xffff) -#define DDR_REGDEF_LEN(regdef) (((regdef)>>16)&0xff) -#define DDR_REGDEF_LSB(regdef) (((regdef)>>24)&0xff) +#define DDR_REGDEF_ADR(regdef) ((regdef) & 0xffff) +#define DDR_REGDEF_LEN(regdef) (((regdef) >> 16) & 0xff) +#define DDR_REGDEF_LSB(regdef) (((regdef) >> 24) & 0xff) static const uint32_t DDR_REGDEF_TBL[4][1173] = { { @@ -5882,5 +5883,5 @@ static const uint32_t DDR_REGDEF_TBL[4][1173] = { /*0492*/ 0x0808031dU, /*0493*/ 0x1008031dU, /*0494*/ 0x1808031dU, - } + } }; |