diff options
author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2018-01-31 10:57:46 +0000 |
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committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2018-02-28 15:05:13 +0000 |
commit | 0400ccb6444838ec2ad9b74a0c37d9339cd7a478 (patch) | |
tree | 8eac81c88ca9715226bba2ef0062d37445592abb /fdts/fvp-base-gicv3-psci-dynamiq.dts | |
parent | bd8e6a99e0ef3bb449b0ff0de13ea74c66079412 (diff) |
fdts: Add DTS for DynamIQ platforms
DynamIQ platforms host all CPUs in a single cluster. This patch adds a
DTS and DTB for DynamicQ platforms hosting up to 8 CPUs.
Change-Id: I2d97bc740ac3062818767e7251020644f5bb9100
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'fdts/fvp-base-gicv3-psci-dynamiq.dts')
-rw-r--r-- | fdts/fvp-base-gicv3-psci-dynamiq.dts | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/fdts/fvp-base-gicv3-psci-dynamiq.dts b/fdts/fvp-base-gicv3-psci-dynamiq.dts new file mode 100644 index 00000000..614c5d5c --- /dev/null +++ b/fdts/fvp-base-gicv3-psci-dynamiq.dts @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/dts-v1/; + +/include/ "fvp-base-gicv3-psci-common.dtsi" + +&CPU0 { + reg = <0x0 0x0>; +}; + +&CPU1 { + reg = <0x0 0x100>; +}; + +&CPU2 { + reg = <0x0 0x200>; +}; + +&CPU3 { + reg = <0x0 0x300>; +}; + +&CPU4 { + reg = <0x0 0x400>; +}; + +&CPU5 { + reg = <0x0 0x500>; +}; + +&CPU6 { + reg = <0x0 0x600>; +}; + +&CPU7 { + reg = <0x0 0x700>; +}; |