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authorEtienne Carriere <etienne.carriere@linaro.org>2017-10-24 22:47:59 +0200
committerUsama Arif <usama.arif@arm.com>2019-02-19 17:07:48 +0000
commitc9fe6fed4bcd930af4ccc487633b35e92d3cc288 (patch)
tree1054a6435db443aa14772f2113275fc95686e25c /include/lib/xlat_tables
parent6393c787b5aa915ea2c707acebd3e330246fe991 (diff)
ARMv7: support non-LPAE mapping (not xlat_v2)
Support 32bit descriptor MMU table. This is required by ARMv7 architectures that do not support the Large Page Address Extensions. nonlpae_tables.c source file is dumped from the OP-TEE project: core_mmu_armv7.c and related header files. Change-Id: If912d66c374290c49c5a1211ce4c5c27b2d7dc60 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Usama Arif <usama.arif@arm.com>
Diffstat (limited to 'include/lib/xlat_tables')
-rw-r--r--include/lib/xlat_tables/xlat_tables_defs.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/lib/xlat_tables/xlat_tables_defs.h b/include/lib/xlat_tables/xlat_tables_defs.h
index 6d0fb789..f9bbe0f6 100644
--- a/include/lib/xlat_tables/xlat_tables_defs.h
+++ b/include/lib/xlat_tables/xlat_tables_defs.h
@@ -73,7 +73,11 @@
#define PAGE_SIZE_MASK (PAGE_SIZE - U(1))
#define IS_PAGE_ALIGNED(addr) (((addr) & PAGE_SIZE_MASK) == U(0))
-#define XLAT_ENTRY_SIZE_SHIFT U(3) /* Each MMU table entry is 8 bytes (1 << 3) */
+#if (ARM_ARCH_MAJOR == 7) && !ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING
+#define XLAT_ENTRY_SIZE_SHIFT U(2) /* Each MMU table entry is 4 bytes */
+#else
+#define XLAT_ENTRY_SIZE_SHIFT U(3) /* Each MMU table entry is 8 bytes */
+#endif
#define XLAT_ENTRY_SIZE (U(1) << XLAT_ENTRY_SIZE_SHIFT)
#define XLAT_TABLE_SIZE_SHIFT PAGE_SIZE_SHIFT /* Size of one complete table */