diff options
author | Roberto Vargas <roberto.vargas@arm.com> | 2017-10-30 14:43:43 +0000 |
---|---|---|
committer | Roberto Vargas <roberto.vargas@arm.com> | 2018-01-18 09:42:35 +0000 |
commit | b1d27b484f4172542eca074fdac42ffd13736a0f (patch) | |
tree | aa9ceb97f7bb103de9bfc7237169aa3e833c2ba7 /include/lib | |
parent | 34c2b9c2f144e213533c00bbdedb8da5b786311b (diff) |
bl2-el3: Add BL2_EL3 image
This patch enables BL2 to execute at the highest exception level
without any dependancy on TF BL1. This enables platforms which already
have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL
stages without need for BL1. This is not currently possible because
BL2 executes at S-EL1 and cannot jump straight to EL3.
Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'include/lib')
-rw-r--r-- | include/lib/cpus/aarch32/cpu_macros.S | 10 | ||||
-rw-r--r-- | include/lib/cpus/aarch64/cpu_macros.S | 10 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_v2_helpers.h | 2 |
3 files changed, 15 insertions, 7 deletions
diff --git a/include/lib/cpus/aarch32/cpu_macros.S b/include/lib/cpus/aarch32/cpu_macros.S index e2e4316d..0f3a5728 100644 --- a/include/lib/cpus/aarch32/cpu_macros.S +++ b/include/lib/cpus/aarch32/cpu_macros.S @@ -9,6 +9,10 @@ #include <arch.h> #include <errata_report.h> +#if defined(IMAGE_BL1) || defined(IMAGE_BL32) || (defined(IMAGE_BL2) && BL2_AT_EL3) +#define IMAGE_AT_EL3 +#endif + #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ (MIDR_PN_MASK << MIDR_PN_SHIFT) @@ -38,7 +42,7 @@ CPU_MIDR: /* cpu_ops midr */ .space 4 /* Reset fn is needed during reset */ -#if defined(IMAGE_BL1) || defined(IMAGE_BL32) +#if defined(IMAGE_AT_EL3) CPU_RESET_FUNC: /* cpu_ops reset_func */ .space 4 #endif @@ -54,7 +58,7 @@ CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ #if REPORT_ERRATA CPU_ERRATA_FUNC: /* CPU errata status printing function */ .space 4 -#ifdef IMAGE_BL32 +#if defined(IMAGE_BL32) CPU_ERRATA_LOCK: .space 4 CPU_ERRATA_PRINTED: @@ -120,7 +124,7 @@ CPU_OPS_SIZE = . .align 2 .type cpu_ops_\_name, %object .word \_midr -#if defined(IMAGE_BL1) || defined(IMAGE_BL32) +#if defined(IMAGE_AT_EL3) .word \_resetfunc #endif #ifdef IMAGE_BL32 diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index a8c23e5e..ccf53066 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -21,6 +21,10 @@ /* Word size for 64-bit CPUs */ #define CPU_WORD_SIZE 8 +#if defined(IMAGE_BL1) || defined(IMAGE_BL31) ||(defined(IMAGE_BL2) && BL2_AT_EL3) +#define IMAGE_AT_EL3 +#endif + /* * Whether errata status needs reporting. Errata status is printed in debug * builds for both BL1 and BL31 images. @@ -38,7 +42,7 @@ CPU_MIDR: /* cpu_ops midr */ .space 8 /* Reset fn is needed in BL at reset vector */ -#if defined(IMAGE_BL1) || defined(IMAGE_BL31) +#if defined(IMAGE_AT_EL3) CPU_RESET_FUNC: /* cpu_ops reset_func */ .space 8 #endif @@ -54,7 +58,7 @@ CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ #if REPORT_ERRATA CPU_ERRATA_FUNC: .space 8 -#ifdef IMAGE_BL31 +#if defined(IMAGE_BL31) CPU_ERRATA_LOCK: .space 8 CPU_ERRATA_PRINTED: @@ -124,7 +128,7 @@ CPU_OPS_SIZE = . .align 3 .type cpu_ops_\_name, %object .quad \_midr -#if defined(IMAGE_BL1) || defined(IMAGE_BL31) +#if defined(IMAGE_AT_EL3) .quad \_resetfunc #endif #ifdef IMAGE_BL31 diff --git a/include/lib/xlat_tables/xlat_tables_v2_helpers.h b/include/lib/xlat_tables/xlat_tables_v2_helpers.h index 1be99b71..de1c2d4b 100644 --- a/include/lib/xlat_tables/xlat_tables_v2_helpers.h +++ b/include/lib/xlat_tables/xlat_tables_v2_helpers.h @@ -168,7 +168,7 @@ struct xlat_ctx { * This IMAGE_EL macro must not to be used outside the library, and it is only * used in AArch64. */ -#if defined(IMAGE_BL1) || defined(IMAGE_BL31) +#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3) # define IMAGE_EL 3 # define IMAGE_XLAT_DEFAULT_REGIME EL3_REGIME #else |