diff options
| author | Roberto Vargas <roberto.vargas@arm.com> | 2017-08-08 11:27:20 +0100 |
|---|---|---|
| committer | Roberto Vargas <roberto.vargas@arm.com> | 2017-09-25 13:32:20 +0100 |
| commit | b09ba056c4203a3fcca78675aa3de257023b7d70 (patch) | |
| tree | 870f31a821c17f5cd24cba24d15ea17a11231029 /include/plat | |
| parent | f145403c2a1a7064cb55670ac0674dc6586398ab (diff) | |
mem_protect: Add DRAM2 to the list of mem protected ranges
On ARM platforms, the maximum size of the address space is limited
to 32-bits as defined in arm_def.h. In order to access DRAM2, which
is defined beyond the 32-bit address space, the maximum address space
is increased to 36-bits in AArch64. It is possible to increase the
virtual space for AArch32, but it is more difficult and not supported
for now.
NOTE - the actual maximum memory address space is platform dependent
and is checked at run-time by querying the PARange field in the
ID_AA64MMFR0_EL1 register.
Change-Id: I6cb05c78a63b1fed96db9a9773faca04a5b93d67
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'include/plat')
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 787ccb02..dbf102b8 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -177,7 +177,12 @@ ARM_NS_DRAM1_SIZE, \ MT_MEMORY | MT_RW | MT_NS) +#define ARM_MAP_DRAM2 MAP_REGION_FLAT( \ + ARM_DRAM2_BASE, \ + ARM_DRAM2_SIZE, \ + MT_MEMORY | MT_RW | MT_NS) #ifdef SPD_tspd + #define ARM_MAP_TSP_SEC_MEM MAP_REGION_FLAT( \ TSP_SEC_MEM_BASE, \ TSP_SEC_MEM_SIZE, \ @@ -224,8 +229,18 @@ * Required platform porting definitions common to all ARM standard platforms *****************************************************************************/ +/* + * We need to access DRAM2 from BL2 for PSCI_MEM_PROTECT for + * AArch64 builds + */ +#ifdef AARCH64 +#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 36) +#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 36) +#else #define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32) #define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32) +#endif + /* * This macro defines the deepest retention state possible. A higher state |