diff options
| author | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-21 16:35:49 +0000 |
|---|---|---|
| committer | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-02-28 09:56:58 +0000 |
| commit | 5bd2c24f17fa24e8ee9e468c1401c809a97aae53 (patch) | |
| tree | 9e916790c50626b6495482698f96edd2d59ca6fe /lib/cpus | |
| parent | 0f6fbbd2e512d45eda760b8d6829cd24b94fe6db (diff) | |
Cortex-A57: Implement workaround for erratum 817169
Change-Id: I25f29a275ecccd7d0c9d33906e6c85967caa767a
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'lib/cpus')
| -rw-r--r-- | lib/cpus/aarch32/cortex_a57.S | 22 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_a57.S | 22 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
3 files changed, 52 insertions, 0 deletions
diff --git a/lib/cpus/aarch32/cortex_a57.S b/lib/cpus/aarch32/cortex_a57.S index 63412766..2e97abbe 100644 --- a/lib/cpus/aarch32/cortex_a57.S +++ b/lib/cpus/aarch32/cortex_a57.S @@ -46,6 +46,13 @@ func cortex_a57_disable_ext_debug mov r0, #1 stcopr r0, DBGOSDLR isb +#if ERRATA_A57_817169 + /* + * Invalidate any TLB address + */ + mov r0, #0 + stcopr r0, TLBIMVA +#endif dsb sy bx lr endfunc cortex_a57_disable_ext_debug @@ -152,6 +159,20 @@ func check_errata_814670 b cpu_rev_var_ls endfunc check_errata_814670 + /* ---------------------------------------------------- + * Errata Workaround for Cortex A57 Errata #817169. + * This applies only to revision <= r0p1 of Cortex A57. + * ---------------------------------------------------- + */ +func check_errata_817169 + /* + * Even though this is only needed for revision <= r0p1, it + * is always applied because of the low cost of the workaround. + */ + mov r0, #ERRATA_APPLIES + bx lr +endfunc check_errata_817169 + /* -------------------------------------------------------------------- * Disable the over-read from the LDNP instruction. * @@ -568,6 +589,7 @@ func cortex_a57_errata_report report_errata ERRATA_A57_813419, cortex_a57, 813419 report_errata ERRATA_A57_813420, cortex_a57, 813420 report_errata ERRATA_A57_814670, cortex_a57, 814670 + report_errata ERRATA_A57_817169, cortex_a57, 817169 report_errata A57_DISABLE_NON_TEMPORAL_HINT, cortex_a57, \ disable_ldnp_overread report_errata ERRATA_A57_826974, cortex_a57, 826974 diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S index 6fa8506f..dd03c0f0 100644 --- a/lib/cpus/aarch64/cortex_a57.S +++ b/lib/cpus/aarch64/cortex_a57.S @@ -59,6 +59,13 @@ func cortex_a57_disable_ext_debug mov x0, #1 msr osdlr_el1, x0 isb +#if ERRATA_A57_817169 + /* + * Invalidate any TLB address + */ + mov x0, #0 + tlbi vae3, x0 +#endif dsb sy ret endfunc cortex_a57_disable_ext_debug @@ -160,6 +167,20 @@ func check_errata_814670 b cpu_rev_var_ls endfunc check_errata_814670 + /* ---------------------------------------------------- + * Errata Workaround for Cortex A57 Errata #817169. + * This applies only to revision <= r0p1 of Cortex A57. + * ---------------------------------------------------- + */ +func check_errata_817169 + /* + * Even though this is only needed for revision <= r0p1, it + * is always applied because of the low cost of the workaround. + */ + mov x0, #ERRATA_APPLIES + ret +endfunc check_errata_817169 + /* -------------------------------------------------------------------- * Disable the over-read from the LDNP instruction. * @@ -571,6 +592,7 @@ func cortex_a57_errata_report report_errata ERRATA_A57_813419, cortex_a57, 813419 report_errata ERRATA_A57_813420, cortex_a57, 813420 report_errata ERRATA_A57_814670, cortex_a57, 814670 + report_errata ERRATA_A57_817169, cortex_a57, 817169 report_errata A57_DISABLE_NON_TEMPORAL_HINT, cortex_a57, \ disable_ldnp_overread report_errata ERRATA_A57_826974, cortex_a57, 826974 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index d8555bc5..5eb03baa 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -115,6 +115,10 @@ ERRATA_A57_813420 ?=0 # only to revision r0p0 of the Cortex A57 cpu. ERRATA_A57_814670 ?=0 +# Flag to apply erratum 817169 workaround during power down. This erratum +# applies only to revision <= r0p1 of the Cortex A57 cpu. +ERRATA_A57_817169 ?=0 + # Flag to apply erratum 826974 workaround during reset. This erratum applies # only to revision <= r1p1 of the Cortex A57 cpu. ERRATA_A57_826974 ?=0 @@ -208,6 +212,10 @@ $(eval $(call add_define,ERRATA_A57_813420)) $(eval $(call assert_boolean,ERRATA_A57_814670)) $(eval $(call add_define,ERRATA_A57_814670)) +# Process ERRATA_A57_817169 flag +$(eval $(call assert_boolean,ERRATA_A57_817169)) +$(eval $(call add_define,ERRATA_A57_817169)) + # Process ERRATA_A57_826974 flag $(eval $(call assert_boolean,ERRATA_A57_826974)) $(eval $(call add_define,ERRATA_A57_826974)) |