diff options
author | Paul Beesley <paul.beesley@arm.com> | 2019-01-11 18:26:51 +0000 |
---|---|---|
committer | Paul Beesley <paul.beesley@arm.com> | 2019-01-15 15:16:02 +0000 |
commit | 8aabea3358670f26cfa9eb99f8cd935d928f6da0 (patch) | |
tree | d8c5c20d785e36d8d77b6ff06f000775a5a89236 /lib/el3_runtime | |
parent | fe77b53e32692fc5d35df208e2b3d21a28f6228b (diff) |
Correct typographical errors
Corrects typos in core code, documentation files, drivers, Arm
platforms and services.
None of the corrections affect code; changes are limited to comments
and other documentation.
Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'lib/el3_runtime')
-rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 8a5764ce..b956491e 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -55,7 +55,7 @@ void __init cm_init(void) * The security state to initialize is determined by the SECURE attribute * of the entry_point_info. * - * The EE and ST attributes are used to configure the endianess and secure + * The EE and ST attributes are used to configure the endianness and secure * timer availability for the new execution context. * * To prepare the register state for entry call cm_prepare_el3_exit() and @@ -124,7 +124,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) #ifdef IMAGE_BL31 /* - * SCR_EL3.IRQ, SCR_EL3.FIQ: Enable the physical FIQ and IRQ rounting as + * SCR_EL3.IRQ, SCR_EL3.FIQ: Enable the physical FIQ and IRQ routing as * indicated by the interrupt routing model for BL31. */ scr_el3 |= get_scr_el3_from_routing_model(security_state); @@ -175,7 +175,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) /* * Store the initialised SCTLR_EL1 value in the cpu_context - SCTLR_EL2 - * and other EL2 registers are set up by cm_preapre_ns_entry() as they + * and other EL2 registers are set up by cm_prepare_ns_entry() as they * are not part of the stored cpu_context. */ write_ctx_reg(get_sysregs_ctx(ctx), CTX_SCTLR_EL1, sctlr_elx); @@ -350,7 +350,7 @@ void cm_prepare_el3_exit(uint32_t security_state) | CPTR_EL2_TFP_BIT)); /* - * Initiliase CNTHCTL_EL2. All fields are + * Initialise CNTHCTL_EL2. All fields are * architecturally UNKNOWN on reset and are set to zero * except for field(s) listed below. * |