diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-01-06 14:58:11 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-03-02 11:00:20 +0000 |
| commit | a10d3632acbd1135648f07c2a998cba8c5c77cfd (patch) | |
| tree | a3e1102a480787af436c363424e7a7821a7695d2 /lib/psci/psci_off.c | |
| parent | d4593e4713617b455929960eb616c9c09e446dc4 (diff) | |
PSCI: Introduce cache and barrier wrappers
The PSCI implementation performs cache maintenance operations on its
data structures to ensure their visibility to both cache-coherent and
non-cache-coherent participants. These cache maintenance operations
can be skipped if all PSCI participants are cache-coherent. When
HW_ASSISTED_COHERENCY build option is enabled, we assume PSCI
participants are cache-coherent.
For usage abstraction, this patch introduces wrappers for PSCI cache
maintenance and barrier operations used for state coordination: they are
effectively NOPs when HW_ASSISTED_COHERENCY is enabled, but are
applied otherwise.
Also refactor local state usage and associated cache operations to make
it clearer.
Change-Id: I77f17a90cba41085b7188c1345fe5731c99fad87
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'lib/psci/psci_off.c')
| -rw-r--r-- | lib/psci/psci_off.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/psci/psci_off.c b/lib/psci/psci_off.c index 394aaa3b..94cf2ede 100644 --- a/lib/psci/psci_off.c +++ b/lib/psci/psci_off.c @@ -154,17 +154,17 @@ exit: */ if (rc == PSCI_E_SUCCESS) { /* - * Set the affinity info state to OFF. This writes directly to - * main memory as caches are disabled, so cache maintenance is + * Set the affinity info state to OFF. When caches are disabled, + * this writes directly to main memory, so cache maintenance is * required to ensure that later cached reads of aff_info_state - * return AFF_STATE_OFF. A dsbish() ensures ordering of the + * return AFF_STATE_OFF. A dsbish() ensures ordering of the * update to the affinity info state prior to cache line * invalidation. */ - flush_cpu_data(psci_svc_cpu_data.aff_info_state); + psci_flush_cpu_data(psci_svc_cpu_data.aff_info_state); psci_set_aff_info_state(AFF_STATE_OFF); - dsbish(); - inv_cpu_data(psci_svc_cpu_data.aff_info_state); + psci_dsbish(); + psci_inv_cpu_data(psci_svc_cpu_data.aff_info_state); #if ENABLE_RUNTIME_INSTRUMENTATION |