diff options
author | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-03-25 09:24:51 +0100 |
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committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-03-27 12:22:09 +0100 |
commit | 8091a6c56a568b09935fd1279ed562de4327cdb3 (patch) | |
tree | e54059881664c56806d324d41f421a8d93212b40 /plat/imx/imx8m/imx8mm | |
parent | ca113aa47a0de7f3863dc61db7ffe1336461147b (diff) |
TEE-532-2: plat: imx8mm: add optee support
Port and cleanup OP-TEE support.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/imx8mm')
-rw-r--r-- | plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c | 12 | ||||
-rw-r--r-- | plat/imx/imx8m/imx8mm/include/platform_def.h | 2 |
2 files changed, 11 insertions, 3 deletions
diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c index 1cd0ddc2..22f1da93 100644 --- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c @@ -160,13 +160,19 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, bl32_image_ep_info.pc = BL32_BASE; bl32_image_ep_info.spsr = 0; + /* Pass TEE base and size to bl33 */ + bl33_image_ep_info.args.arg1 = BL32_BASE; + bl33_image_ep_info.args.arg2 = BL32_SIZE; + #ifdef SPD_trusty bl32_image_ep_info.args.arg0 = BL32_SIZE; bl32_image_ep_info.args.arg1 = BL32_BASE; +#else + /* Make sure memory is clean */ + mmio_write_32(BL32_FDT_OVERLAY_ADDR, 0); + bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; + bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; #endif - /* Pass TEE base and size to bl33 */ - bl33_image_ep_info.args.arg1 = BL32_BASE; - bl33_image_ep_info.args.arg2 = BL32_SIZE; #endif bl31_tzc380_setup(); diff --git a/plat/imx/imx8m/imx8mm/include/platform_def.h b/plat/imx/imx8m/imx8mm/include/platform_def.h index 2d30f680..bcd84ba5 100644 --- a/plat/imx/imx8m/imx8mm/include/platform_def.h +++ b/plat/imx/imx8m/imx8mm/include/platform_def.h @@ -37,6 +37,8 @@ /* non-secure uboot base */ #define PLAT_NS_IMAGE_OFFSET U(0x40200000) +#define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000) + /* GICv3 base address */ #define PLAT_GICD_BASE U(0x38800000) #define PLAT_GICR_BASE U(0x38880000) |