diff options
author | Ye Li <ye.li@nxp.com> | 2019-02-27 00:07:10 -0800 |
---|---|---|
committer | Anson Huang <Anson.Huang@nxp.com> | 2019-12-13 10:45:50 +0800 |
commit | 357fbf3cf0fa72c21e1c0ed52cfed9010fe312e4 (patch) | |
tree | ed07e73e659d3473a6a79ac02fd151efd8e97d5d /plat/imx | |
parent | fdd8c22694528c072b0b06c0bb53d2d7c94d55f2 (diff) |
MLK-20986 imx8: Not protect OCRAM for rev A
On iMX8 Rev A the OCRAM is used to pass over ROM info, and u-boot
needs to access it. So we can't assign the OCRAM to ATF partition.
This will cause boot hang.
Rev A does not support SPL, so it is ok to not protect the OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit c9a168bfd16e06b4d6b9f94185910023e4923cf2)
Diffstat (limited to 'plat/imx')
-rw-r--r-- | plat/imx/common/imx_sip_handler.c | 17 | ||||
-rw-r--r-- | plat/imx/common/include/imx_sip_svc.h | 1 | ||||
-rw-r--r-- | plat/imx/imx8qm/imx8qm_bl31_setup.c | 7 | ||||
-rw-r--r-- | plat/imx/imx8qx/imx8qx_bl31_setup.c | 7 |
4 files changed, 30 insertions, 2 deletions
diff --git a/plat/imx/common/imx_sip_handler.c b/plat/imx/common/imx_sip_handler.c index b2df9f95..2d8e5219 100644 --- a/plat/imx/common/imx_sip_handler.c +++ b/plat/imx/common/imx_sip_handler.c @@ -178,6 +178,23 @@ int imx_misc_set_temp_handler(uint32_t smc_fid, return sc_misc_set_temp(ipc_handle, x1, x2, x3, x4); } +int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev) +{ + uint32_t id; + sc_err_t err; + + if (!cpu_id || !cpu_rev) + return -1; + + err = sc_misc_get_control(ipc_handle, SC_R_SYSTEM, SC_C_ID, &id); + if (err != SC_ERR_NONE) + return err; + + *cpu_rev = (id >> 5) & 0xf; + *cpu_id = id & 0x1f; + + return 0; +} #endif /* defined(PLAT_imx8qm) || defined(PLAT_imx8qx) */ static uint64_t imx_get_commit_hash(u_register_t x2, diff --git a/plat/imx/common/include/imx_sip_svc.h b/plat/imx/common/include/imx_sip_svc.h index 8dcc8a02..26daa8c6 100644 --- a/plat/imx/common/include/imx_sip_svc.h +++ b/plat/imx/common/include/imx_sip_svc.h @@ -57,6 +57,7 @@ int imx_otp_handler(uint32_t smc_fid, void *handle, int imx_misc_set_temp_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, u_register_t x4); +int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev); #endif uint64_t imx_buildinfo_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c index 4940f351..3d072fbf 100644 --- a/plat/imx/imx8qm/imx8qm_bl31_setup.c +++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c @@ -26,6 +26,7 @@ #include <plat_imx8.h> #include <sci/sci.h> #include <sec_rsrc.h> +#include <imx_sip_svc.h> IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START); IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END); @@ -165,6 +166,10 @@ void mx8_partition_resources(void) bool owned, owned2; sc_err_t err; int i; + uint32_t cpu_id, cpu_rev = 0x1; /* Set Rev B as default */ + + if (imx_get_cpu_rev(&cpu_id, &cpu_rev) != 0) + ERROR("Get CPU id and rev failed\n"); err = sc_rm_get_partition(ipc_handle, &secure_part); @@ -198,7 +203,7 @@ void mx8_partition_resources(void) if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { mr_record = mr; /* Record the mr for ATF running */ } - else if (0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) { + else if (cpu_rev >= 1 && 0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) { mr_ocram = mr; } else { diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c index 83d11fc9..82e7cf66 100644 --- a/plat/imx/imx8qx/imx8qx_bl31_setup.c +++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c @@ -26,6 +26,7 @@ #include <plat_imx8.h> #include <sci/sci.h> #include <sec_rsrc.h> +#include <imx_sip_svc.h> IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START); IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END); @@ -160,6 +161,10 @@ void imx8_partition_resources(void) sc_err_t err; bool owned; int i; + uint32_t cpu_id, cpu_rev = 0x1; /* Set Rev B as default */ + + if (imx_get_cpu_rev(&cpu_id, &cpu_rev) != 0) + ERROR("Get CPU id and rev failed\n"); err = sc_rm_get_partition(ipc_handle, &secure_part); if (err) @@ -199,7 +204,7 @@ void imx8_partition_resources(void) if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { mr_record = mr; /* Record the mr for ATF running */ } - else if (0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) { + else if (cpu_rev >= 1 && 0 >= start && (OCRAM_BASE + OCRAM_ALIAS_SIZE - 1) <= end) { mr_ocram = mr; } else { |