diff options
| author | Harvey Hsieh <hhsieh@nvidia.com> | 2017-08-21 15:01:53 +0800 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-01-18 09:21:51 -0800 |
| commit | 650d9c521e271f9802c8c95da456875f348fc8cc (patch) | |
| tree | e269778ec1855fe5f6d8b3a013069920b34265a0 /plat/nvidia/tegra/common | |
| parent | b627d0837c811b2714648cc873b8b092c72432cd (diff) | |
Tegra: memctrl: clean MC INT status before exit to bootloader
This patch cleans the Memory controller's interrupt status
register, before exiting to the non-secure world during
cold boot. This is required as we observed that the MC's
arbitration bit is set before exiting the secure world.
Change-Id: Iacd01994d03b3b9cbd7b8a57fe7ab5b04e607a9f
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/common')
| -rw-r--r-- | plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c | 13 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c | 5 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_bl31_setup.c | 9 |
3 files changed, 27 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c index 27ad563b..92fa273b 100644 --- a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c +++ b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v1.c @@ -209,3 +209,16 @@ void tegra_memctrl_disable_ahb_redirection(void) /* lock the aperture registers */ tegra_mc_write_32(MC_IRAM_REG_CTRL, MC_DISABLE_IRAM_CFG_WRITES); } + +void tegra_memctrl_clear_pending_interrupts(void) +{ + uint32_t mcerr; + + /* check if there are any pending interrupts */ + mcerr = mmio_read_32(TEGRA_MC_BASE + MC_INTSTATUS); + + if (mcerr != (uint32_t)0U) { /* should not see error here */ + WARN("MC_INTSTATUS = 0x%x (should be zero)\n", mcerr); + mmio_write_32((TEGRA_MC_BASE + MC_INTSTATUS), mcerr); + } +} diff --git a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c index cfa95818..1b221c2f 100644 --- a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c +++ b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c @@ -712,3 +712,8 @@ void tegra_memctrl_disable_ahb_redirection(void) { ; /* do nothing */ } + +void tegra_memctrl_clear_pending_interrupts(void) +{ + ; /* do nothing */ +} diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index 30ff0a38..afb10fef 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -342,6 +342,15 @@ void bl31_platform_setup(void) void bl31_plat_runtime_setup(void) { /* + * During cold boot, it is observed that the arbitration + * bit is set in the Memory controller leading to false + * error interrupts in the non-secure world. To avoid + * this, clean the interrupt status register before + * booting into the non-secure world + */ + tegra_memctrl_clear_pending_interrupts(); + + /* * During boot, USB3 and flash media (SDMMC/SATA) devices need * access to IRAM. Because these clients connect to the MC and * do not have a direct path to the IRAM, the MC implements AHB |