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authorVarun Wadekar <vwadekar@nvidia.com>2017-03-06 09:15:15 -0800
committerVarun Wadekar <vwadekar@nvidia.com>2017-03-07 10:27:21 -0800
commit1f38d3c955730513a0ed625adb3b83b668cb1764 (patch)
tree58c9b45a5a482bc94f73787a5c1f70f099775289 /plat/nvidia/tegra/platform.mk
parent32bf0e2985e008ba7744b71c1f11397feae9af28 (diff)
Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs
This patch enables the following erratas for the Tegra210 SoC: * Cortex-A57 ============= - A57_DISABLE_NON_TEMPORAL_HINT - ERRATA_A57_826974 - ERRATA_A57_826977 - ERRATA_A57_828024 - ERRATA_A57_829520 - ERRATA_A57_833471 * Cortex-A53 ============= - A53_DISABLE_NON_TEMPORAL_HINT - ERRATA_A53_826319 - ERRATA_A53_836870 Tegra210 uses Cortex-A57 revision: r1p1 and Cortex-A53 revision: r0p2. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/platform.mk')
-rw-r--r--plat/nvidia/tegra/platform.mk10
1 files changed, 1 insertions, 9 deletions
diff --git a/plat/nvidia/tegra/platform.mk b/plat/nvidia/tegra/platform.mk
index b168634e..2eeffca7 100644
--- a/plat/nvidia/tegra/platform.mk
+++ b/plat/nvidia/tegra/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -36,14 +36,6 @@ PSCI_EXTENDED_STATE_ID := 1
# Disable the PSCI platform compatibility layer
ENABLE_PLAT_COMPAT := 0
-# Disable cache non-temporal hint for A57
-A57_DISABLE_NON_TEMPORAL_HINT := 0
-$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
-
-# Disable cache non-temporal hint for A53
-A53_DISABLE_NON_TEMPORAL_HINT := 0
-$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
-
include plat/nvidia/tegra/common/tegra_common.mk
include ${SOC_DIR}/platform_${TARGET_SOC}.mk