diff options
author | Samuel Payne <spayne@nvidia.com> | 2017-06-12 16:38:23 -0700 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-01-18 09:21:50 -0800 |
commit | 86d0a52b8433fb1bd9ad9014912e4a1068b0b1c1 (patch) | |
tree | eebdb08ee2a5cb227c2ae502cc965e618d08586d /plat/nvidia/tegra/soc | |
parent | 61beb3e016592b047685f17578461e880af4746a (diff) |
Tegra210: se: disable SMMU before suspending SE block
This patch disables SMMU hardware before suspending the SE
block, for the context save operation to complete. The NS
word will re-enable SMMU when we exit System Suspend.
Change-Id: I4d5cd982ea6780db5c38b124550d847e3928c60d
Signed-off-by: Samuel Payne <spayne@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/soc')
-rw-r--r-- | plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c b/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c index c59ec75f..64c17364 100644 --- a/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c +++ b/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c @@ -401,6 +401,14 @@ void tegra_se_init(void) int32_t tegra_se_suspend(void) { int32_t ret = 0; + uint32_t val = 0; + + /* SE does not use SMMU in EL3, disable SMMU. + * This will be re-enabled by kernel on resume */ + val = mmio_read_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0); + val &= ~PPCS_SMMU_ENABLE; + mmio_write_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0, val); + /* Atomic context save se2 and pka1 */ INFO("%s: SE2/PKA1 atomic context save\n", __func__); |