diff options
| author | Christoph Müllner <christophm30@gmail.com> | 2019-05-01 01:37:58 +0200 |
|---|---|---|
| committer | Christoph Müllner <christophm30@gmail.com> | 2019-05-01 02:15:43 +0200 |
| commit | 0957b9b2717d314fc669b22542e8329d48f178ef (patch) | |
| tree | 4a01a736bb760fe4d37b05dffe4ce89ab7bce056 /plat/rockchip/rk3288 | |
| parent | 19b4f689c6f58cb2da9377bcec32c79a97d3fb73 (diff) | |
rockchip: Streamline and complete UARTn_BASE macros.
In order to set the UART base during bootup in common code of
plat/rockchip, we need to streamline the way the UART base addresses
are defined and add the missing definitions and mappings.
This patch does so by following the pattern UARTn_BASE, which is
already in use on RK3399 and RK3328. The numbering itself is derived
from the upstream Linux DTS files of the individual SoCs.
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
Diffstat (limited to 'plat/rockchip/rk3288')
| -rw-r--r-- | plat/rockchip/rk3288/drivers/soc/soc.c | 10 | ||||
| -rw-r--r-- | plat/rockchip/rk3288/include/platform_def.h | 2 | ||||
| -rw-r--r-- | plat/rockchip/rk3288/rk3288_def.h | 17 |
3 files changed, 24 insertions, 5 deletions
diff --git a/plat/rockchip/rk3288/drivers/soc/soc.c b/plat/rockchip/rk3288/drivers/soc/soc.c index db90ae41..36f410b1 100644 --- a/plat/rockchip/rk3288/drivers/soc/soc.c +++ b/plat/rockchip/rk3288/drivers/soc/soc.c @@ -34,7 +34,15 @@ const mmap_region_t plat_rk_mmap[] = { MT_DEVICE | MT_RW | MT_SECURE), MAP_REGION_FLAT(PMU_BASE, PMU_SIZE, MT_DEVICE | MT_RW | MT_SECURE), - MAP_REGION_FLAT(UART_DBG_BASE, UART_DBG_SIZE, + MAP_REGION_FLAT(UART0_BASE, UART0_SIZE, + MT_DEVICE | MT_RW | MT_SECURE), + MAP_REGION_FLAT(UART1_BASE, UART1_SIZE, + MT_DEVICE | MT_RW | MT_SECURE), + MAP_REGION_FLAT(UART2_BASE, UART2_SIZE, + MT_DEVICE | MT_RW | MT_SECURE), + MAP_REGION_FLAT(UART3_BASE, UART3_SIZE, + MT_DEVICE | MT_RW | MT_SECURE), + MAP_REGION_FLAT(UART4_BASE, UART4_SIZE, MT_DEVICE | MT_RW | MT_SECURE), MAP_REGION_FLAT(CRU_BASE, CRU_SIZE, MT_DEVICE | MT_RW | MT_SECURE), diff --git a/plat/rockchip/rk3288/include/platform_def.h b/plat/rockchip/rk3288/include/platform_def.h index d9e0bc64..e24aeffa 100644 --- a/plat/rockchip/rk3288/include/platform_def.h +++ b/plat/rockchip/rk3288/include/platform_def.h @@ -87,7 +87,7 @@ #define PLAT_RK_GICD_BASE RK3288_GICD_BASE #define PLAT_RK_GICC_BASE RK3288_GICC_BASE -#define PLAT_RK_UART_BASE RK3288_UART2_BASE +#define PLAT_RK_UART_BASE UART2_BASE #define PLAT_RK_UART_CLOCK RK3288_UART_CLOCK #define PLAT_RK_UART_BAUDRATE RK3288_BAUDRATE diff --git a/plat/rockchip/rk3288/rk3288_def.h b/plat/rockchip/rk3288/rk3288_def.h index 7b5018c7..7bff8651 100644 --- a/plat/rockchip/rk3288/rk3288_def.h +++ b/plat/rockchip/rk3288/rk3288_def.h @@ -28,8 +28,20 @@ #define DDR_PHY1_BASE 0xff640000 #define DDR_PHY1_SIZE SIZE_K(64) -#define UART_DBG_BASE 0xff690000 -#define UART_DBG_SIZE SIZE_K(64) +#define UART0_BASE 0xff180000 +#define UART0_SIZE SIZE_K(64) + +#define UART1_BASE 0xff190000 +#define UART1_SIZE SIZE_K(64) + +#define UART2_BASE 0xff690000 +#define UART2_SIZE SIZE_K(64) + +#define UART3_BASE 0xff1b0000 +#define UART3_SIZE SIZE_K(64) + +#define UART4_BASE 0xff1c0000 +#define UART4_SIZE SIZE_K(64) /* 96k instead of 64k? */ #define SRAM_BASE 0xff700000 @@ -71,7 +83,6 @@ /************************************************************************** * UART related constants **************************************************************************/ -#define RK3288_UART2_BASE UART_DBG_BASE #define RK3288_BAUDRATE 115200 #define RK3288_UART_CLOCK 24000000 |