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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-10-31 15:25:35 +0000
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-11-01 14:15:39 +0000
commita0fee7474fb946fcbcd43c4947cf113147e26301 (patch)
treeda05ee3a1ec652ea8aede81f84af0d4e48237a8c /plat
parent3c1fb7a7006b2cd076d958aa8ba14eba25e82de8 (diff)
context_mgmt: Fix MISRA defects
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented(). Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat')
-rw-r--r--plat/arm/common/arm_common.c2
-rw-r--r--plat/arm/common/execution_state_switch.c2
-rw-r--r--plat/hisilicon/hikey/hikey_bl2_setup.c2
-rw-r--r--plat/hisilicon/hikey960/hikey960_bl2_setup.c2
-rw-r--r--plat/layerscape/common/ls_common.c2
-rw-r--r--plat/mediatek/mt6795/bl31_plat_setup.c2
-rw-r--r--plat/qemu/qemu_bl2_setup.c4
7 files changed, 8 insertions, 8 deletions
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index 6b147854..49f00740 100644
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -63,7 +63,7 @@ uint32_t arm_get_spsr_for_bl33_entry(void)
uint32_t spsr;
/* Figure out what mode we enter the non-secure world in */
- mode = EL_IMPLEMENTED(2) ? MODE_EL2 : MODE_EL1;
+ mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in
diff --git a/plat/arm/common/execution_state_switch.c b/plat/arm/common/execution_state_switch.c
index b12d82c1..8fa864d6 100644
--- a/plat/arm/common/execution_state_switch.c
+++ b/plat/arm/common/execution_state_switch.c
@@ -117,7 +117,7 @@ int arm_execution_state_switch(unsigned int smc_fid,
* Switching from AArch64 to AArch32. Ensure this CPU implements
* the target EL in AArch32.
*/
- impl = from_el2 ? EL_IMPLEMENTED(2) : EL_IMPLEMENTED(1);
+ impl = from_el2 ? el_implemented(2) : el_implemented(1);
if (impl != EL_IMPL_A64_A32)
goto exec_denied;
diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index aad350bf..1d7da00a 100644
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -99,7 +99,7 @@ uint32_t hikey_get_spsr_for_bl33_entry(void)
uint32_t spsr;
/* Figure out what mode we enter the non-secure world in */
- mode = EL_IMPLEMENTED(2) ? MODE_EL2 : MODE_EL1;
+ mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in
diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
index f57dd63c..0e79e0a0 100644
--- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
@@ -191,7 +191,7 @@ uint32_t hikey960_get_spsr_for_bl33_entry(void)
uint32_t spsr;
/* Figure out what mode we enter the non-secure world in */
- mode = EL_IMPLEMENTED(2) ? MODE_EL2 : MODE_EL1;
+ mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in
diff --git a/plat/layerscape/common/ls_common.c b/plat/layerscape/common/ls_common.c
index abf6525b..afd5927c 100644
--- a/plat/layerscape/common/ls_common.c
+++ b/plat/layerscape/common/ls_common.c
@@ -147,7 +147,7 @@ uint32_t ls_get_spsr_for_bl33_entry(void)
uint32_t spsr;
/* Figure out what mode we enter the non-secure world in */
- mode = EL_IMPLEMENTED(2) ? MODE_EL2 : MODE_EL1;
+ mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in
diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c
index 96a0bd83..8df7dada 100644
--- a/plat/mediatek/mt6795/bl31_plat_setup.c
+++ b/plat/mediatek/mt6795/bl31_plat_setup.c
@@ -339,7 +339,7 @@ static entry_point_info_t *bl31_plat_get_next_kernel64_ep_info(void)
next_image_info = &bl33_image_ep_info;
/* Figure out what mode we enter the non-secure world in */
- if (EL_IMPLEMENTED(2)) {
+ if (el_implemented(2) != EL_IMPL_NONE) {
INFO("Kernel_EL2\n");
mode = MODE_EL2;
} else{
diff --git a/plat/qemu/qemu_bl2_setup.c b/plat/qemu/qemu_bl2_setup.c
index d76621d8..b3c39605 100644
--- a/plat/qemu/qemu_bl2_setup.c
+++ b/plat/qemu/qemu_bl2_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -118,7 +118,7 @@ static uint32_t qemu_get_spsr_for_bl33_entry(void)
unsigned int mode;
/* Figure out what mode we enter the non-secure world in */
- mode = EL_IMPLEMENTED(2) ? MODE_EL2 : MODE_EL1;
+ mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1;
/*
* TODO: Consider the possibility of specifying the SPSR in