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2017-09-19freescale: replace all GPL with BSD identifier.imx_4.9.51_imx8_beta1Anson Huang
Replace all GPL with BSD identifier. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-15imx8qm/imx8qxp: enable standby suspendAnson Huang
As suspend with last CPU power down needs SCFW support, and it is NOT ready now, in order to enable kernel suspend function earlier for modules to start debugging suspend resume function, this patch adds standby suspend for now. Will add last CPU power down suspend function when SCFW is ready. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-12imx8qm/qxp: Add a new SIP to get commit id of arm trusted firmwareYe Li
Add a new SIP call FSL_SIP_BUILDINFO to return the current commit id in 7 hexadecimal digits which are parsed from the version_string. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-09-11freescale: cpufreq: fix build error using poky tool chainAnson Huang
Fix below build error on i.MX8QXP when using poky tool chain: CC plat/freescale/common/cpufreq.c plat/freescale/common/cpufreq.c:27:18: error: "ap_cluster_index" defined but not used [-Werror=unused-const-variable=] Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-06i.mx8qm/i.mx8qxp: psci: add power off supportAnson Huang
Add system_off pcsi callback to avoid below kernel message when doing power off: [11613.953711] reboot: Power down [11613.958318] systemd-shutdow: 8 output lines suppressed due to ratelimiting [11613.965285] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00 [11613.965285] [11613.974441] CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted 4.9.11-03354-g0e1 [11613.982369] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT) [11613.988216] Call trace: [11613.990681] [<ffff0000080882bc>] dump_backtrace+0x0/0x1a8 [11613.996092] [<ffff000008088478>] show_stack+0x14/0x1c [11614.001154] [<ffff0000083aaf98>] dump_stack+0x8c/0xac [11614.006213] [<ffff000008162aac>] panic+0x124/0x28c [11614.011016] [<ffff0000080c0b20>] complete_and_exit+0x0/0x20 [11614.016600] [<ffff0000080dc6d8>] SyS_reboot+0x168/0x244 [11614.021829] [<ffff000008082ef0>] el0_svc_naked+0x24/0x28 [11614.027153] Kernel Offset: disabled [11614.030646] Memory Limit: none [11614.040755] ---[ end Kernel panic - not syncing: Attempted to kill init! exi0 [11614.040755] As there is no system power off SCFW API available now, so just simply do wfi and never return when system_off is called. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-02imx8mq: gpc: correct ARM power down request register offsetAnson Huang
The GPC_CPU_PGC_SW_PDN_REQ offset should be 0xfc, previous offset is incorrect, so actually ARM core is NOT powered down and the power leakage is very high. With this fix, each ARM core's leakage is about 25mA@0.9V. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-01freescale: add srtc SIP supportAnson Huang
Add SRTC SIP support for i.MX8QM/i.MX8QXP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-01freescale: add SCFW timer API supportAnson Huang
Add SCFW timer API support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-01imx8qxp: add board reset supportAnson Huang
Add i.MX8QXP board reset support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-09-01imx8qm: add board reboot supportAnson Huang
Add i.MX8QM board reboot support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-08-29Update to the latest SCFW API.Ranjani Vaidyanathan
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2017-08-28fix sw pup/pdn issue on imx8mqBai Ping
The bits[3:0] of CPU_PGC_PUP/PDN_TRG use core's SW power up/down. prevous bits assignment is wrong, so fix it. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-08-25i.mx8qm/i.mx8qxp: add SIP cpu-freq supportAnson Huang
Linux kernel will issue cpu-freq scale via SIP, ATF calls SCFW API to finish the CPU frequency scale. Move SIP service code from i.mx8mq to common place for all i.mx SoCs. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-08-17imx8mq: enable PU power domainAnson Huang
- USB PHY reset bit in SRC needs to be clear before doing USB PHY power gating in GPC, only needs to do once; - Need to handle GPC_PU_PWRHSK during power up/down; - Enable GPC pu power gate support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-08-04imx8mq: enable all PUs power until all PUs power on/off function readyAnson Huang
As there are too many difference between each PU's power on/off flow, here enable all PUs power until all modules' power on/off function ready and tested, then we will enable this PU PGC feature. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-08-02imx8mq: fix the pcie power domain dependencyBai Ping
the PCIE1 and PCIE2 share the same reset signal, if PCIE2 is power down, PCIE1 will also be power down, so when we need to power up PCIE1, the PCIE2 need to power up too, only PCIE1 is power down, the PCIE2 power domain can be power down too Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-07-26imx8mq: do NOT enable all PU power during boot upAnson Huang
No need to enable all PU power during boot up, module driver will enable their power domain as needed. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-24imx8mq: Add the AIPS4 configurationsYe Li
Set the MPROTx and OPACRx in AIPS4 configuration registers to allow user mode and non-supervisor privilege level to access. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-07-21imx8qm/qxp: Reserve memory region for ATFYe Li
Reserve the memory region that is only can access by ATF. ATF is running in this memory region, while masters in other partitions can't access it. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-07-19imx8qm/qxp: Modify the memory regions allocation to NS partitionYe Li
Change to search the ATF owned memory regions and assign them to non-secure OS partition. Not allocate new memory region for each one. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-07-19imx8mq: gpc: power domain id needs to be mapped to register bit offsetAnson Huang
The power domain id does NOT equal to the register bit offset, so need to do a mapping here. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-19imx8mq: gpc: add hardware power down for power domainAnson Huang
Add hardware power down for all power domains. Make imx_gpc_set_m_core_pgc usable for all MIX and PU PGC. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-14imx8mq: gpc: mask m4 irq and override PLLs for dsmAnson Huang
Need to mask all M4 IRQ and override all PLLs/OSC before entering DSM mode, but due to DRAM self-refresh NOT ready, non-fast wakeup mode is NOT working, so we still use fast wakeup mode, which means DSM mode by default is NOT entered. After DRAM self-refresh is added, we will switch to non-fast wakeup mode to make DSM work. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-13Move TZC EN into SPLPeng Fan
Move TZC EN into SPL, and add check in ATF. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12imx8m: add SNVS mappingPeng Fan
Add SNVS mapping to avoid system off failure. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12imx8mq: enable tzc380Peng Fan
enable tzc380 for i.mx8mq Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12drivers: add tzc380 supportPeng Fan
Add tzc380 support. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12imx8mq: change back BL31_LIMIT to 0x40020000Peng Fan
Change back BL31_LIMIT to 0x40020000, because TZC380 could not support 4K aligned address. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12imx8mq: add console initPeng Fan
Add console init Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12plat: freescale: imx8mq: add system off supportAnson Huang
Add system off support, linux kernel can issue "poweroff" to power down system. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12imx8mq: add wdog resetPeng Fan
Add wdog reset support. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12imx8mq: config the aipstz2 for imx8mqBai Ping
Enable the non-privilege access for AIPS address space. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-07-12i.mx8mq: Add basic support for i.mx8mqBai Ping
Add basic support for i.MX8MQ. 1. SMP support is ok. 2. basic suspend/resume support is ok. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2017-07-12imx8qm/imx8qxp: no need to disable console in plat runtime setupAnson Huang
As we already have control for debug console in platform_def.h, so no need to un-initialize console in plat runtime setup, just overwrite the common implementation with blank function. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12Enable CPU, FP, L2 retention counters to 64 cyclesNitin Garg
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12iMX8QM/QXP: Allocate memory regions to NS partitionYe Li
Not only the resources, but also the memory regions need to assign to non-secure partition. Otherwise, when the boot partition is secured, the OS non-secure partition can't access any memory. This patch currently assign all memory to NS partition, since it is not isolated, the current secure partition also can access them. In future, may need to change the regions for reserving some memory in secure partition for ATF and BL32. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-07-12iMX8QM: Do not terminate barrier transcations in CCINitin Garg
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12Fix the UART PAD ctrl in last commitNitin Garg
missed bit 31 and 30 which are needed Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12Fix the pinmux to use correct resource ID for iMX8QM/QXNitin Garg
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12i.MX8: Update to the latest SCFW APIRanjani Vaidyanathan
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2017-07-12i.MX8QM: disable debug console by defaultNitin Garg
Disable ATF console output for iMX8QM Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12i.MX8QXP: disable debug console by defaultAnson Huang
Disable debug console by default on i.MX8QXP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12Correct debug console baudrate for i.MX8QXP real boardAnson Huang
Debug console baudrate should be 115200 for i.MX8QXP real board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12Add necessary resources to secure partition for i.MX8QXPAnson Huang
Add necessary resources to secure partition for protection. Also add in functionality to allow for register access of some secure-owned peripherals. These peripherals will still be protected from power or clk changes. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Teo Hall <teo.hall@nxp.com>
2017-07-12Add support for A72 CPU0 as primary cpuAnson Huang
Need to add support for booting up A72 cluster only, so on need to check the cluster ID for primary CPU, that means if CPU ID is 0, then it can be as primary CPU. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12Fix A72 L2 DATA latency and support booting CA72 as primaryNitin Garg
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12Fix MMU mapping for MU in useTeo Hall
change MMU mapping to use the address of the MU currently being used for ATF Signed-off-by: Teo Hall <teo.hall@nxp.com>
2017-07-12update secure partition and add NS accessTeo Hall
add more resources to secure partition for protection. Also add in functionality to allow for register access of some secure-owned peripherals. These peripherals will still be protected from power or clk changes. Signed-off-by: Teo Hall <teo.hall@nxp.com>
2017-07-12add RM scu svc and partition secure MUTeo Hall
add rm svc api and set aside separate MU for secure api calls into SCU Signed-off-by: Teo Hall <teo.hall@nxp.com>
2017-07-12add macro for debug buildTeo Hall
add plat_crash_print_regs macro function to allow building with debug Signed-off-by: Teo Hall <teo.hall@nxp.com>
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