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authorJustin Waters <justin.waters@timesys.com>2008-05-20 17:25:18 -0400
committerJustin Waters <justin.waters@timesys.com>2008-05-20 17:25:18 -0400
commit4c2a2437ea37c42778c318cb6626668518001193 (patch)
tree5a5f18f3461162fbcac124971a258eb3e2cfb658
parent68bfb81f26a08b79c3e2e08a1e85b1b69f887009 (diff)
MX27LITE_GPIO: Fix pins for USBOTG interface
The USBOTG interface uses two GPIO pins for its PWR_EN and OC signals. These pins are associated with the OTG interface and the PWR_EN is cleared since the power enable signal for the power controller is low-true. Signed-off-by: Justin Waters <justin.waters@timesys.com>
-rw-r--r--arch/arm/mach-mx27/mx27lite_gpio.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-mx27/mx27lite_gpio.c b/arch/arm/mach-mx27/mx27lite_gpio.c
index b4734635af49..5e8ff4262a66 100644
--- a/arch/arm/mach-mx27/mx27lite_gpio.c
+++ b/arch/arm/mach-mx27/mx27lite_gpio.c
@@ -302,10 +302,15 @@ int gpio_usbotg_hs_active(void)
gpio_request_mux(MX27_PIN_USBOTG_CLK, GPIO_MUX_PRIMARY) ||
gpio_request_mux(MX27_PIN_USBOTG_DATA7, GPIO_MUX_PRIMARY) ||
- gpio_request_mux(MX27_PIN_USB_OC_B, GPIO_MUX_PRIMARY) ||
- gpio_request_mux(MX27_PIN_USB_PWR, GPIO_MUX_PRIMARY))
+ /* Use TXDM and TXDP pins as power and Overcurrent control */
+ gpio_request_mux(MX27_PIN_USBH1_TXDM, GPIO_MUX_GPIO) ||
+ gpio_request_mux(MX27_PIN_USBH1_TXDP, GPIO_MUX_GPIO))
return -EINVAL;
+ mxc_set_gpio_direction(MX27_PIN_USBH1_TXDM, 0); /* USB1_PWR_nEN */
+ mxc_set_gpio_direction(MX27_PIN_USBH1_TXDP, 1); /* USB1_nOC */
+ mxc_set_gpio_dataout(MX27_PIN_USBH1_TXDM, 0);
+
//__raw_writew(PBC_BCTRL3_OTG_HS_EN, PBC_BCTRL3_CLEAR_REG);
//__raw_writew(PBC_BCTRL3_OTG_VBUS_EN, PBC_BCTRL3_CLEAR_REG);
@@ -328,8 +333,8 @@ void gpio_usbotg_hs_inactive(void)
gpio_free_mux(MX27_PIN_USBOTG_CLK);
gpio_free_mux(MX27_PIN_USBOTG_DATA7);
- gpio_free_mux(MX27_PIN_USB_OC_B);
- gpio_free_mux(MX27_PIN_USB_PWR);
+ gpio_free_mux(MX27_PIN_USBH1_TXDM);
+ gpio_free_mux(MX27_PIN_USBH1_TXDP);
//__raw_writew(PBC_BCTRL3_OTG_HS_EN, PBC_BCTRL3_SET_REG);
}