diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-05-03 14:20:26 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-05-07 08:07:25 +0200 |
| commit | 684834f7d701db3e9ac2307aeef1777a805b9b1c (patch) | |
| tree | 6618119019f8209477b927585f94e1aa1e647c34 | |
| parent | d238aa4153a746f37c24d13554f8861b63dbda5b (diff) | |
ARM: dts: imx8: apalis-imx8qm: fix i2c pin muxing
Fix I2C pin muxing of Apalis I2C1, Apalis I2C2 (DDC), Apalis I2C3 (CAM)
and on-module I2C. We use high drive strength and OPEN_DRAIN_INPUT
configuration. While at it also add a comment indicating which bus is
used on-module.
This fixes DDC/EDID issues as seen on Apalis Evaluation Board V1.1A
with certain HDMI screens.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index c9a17b8719ba..70f6b0534a96 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -332,8 +332,8 @@ /* Apalis I2C2 (DDC) */ pinctrl_lpi2c0: lpi2c0grp { fsl,pins = < - SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0xc600004c - SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0xc600004c + SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x04000022 + SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x04000022 >; }; @@ -511,26 +511,27 @@ >; }; + /* On-module I2C */ pinctrl_lpi2c1: lpi2c1grp { fsl,pins = < - SC_P_GPT0_CLK_DMA_I2C1_SCL 0xc600004c - SC_P_GPT0_CAPTURE_DMA_I2C1_SDA 0xc600004c + SC_P_GPT0_CLK_DMA_I2C1_SCL 0x04000020 + SC_P_GPT0_CAPTURE_DMA_I2C1_SDA 0x04000020 >; }; /* Apalis I2C1 */ pinctrl_lpi2c2: lpi2c2grp { fsl,pins = < - SC_P_GPT1_CLK_DMA_I2C2_SCL 0xc600004c - SC_P_GPT1_CAPTURE_DMA_I2C2_SDA 0xc600004c + SC_P_GPT1_CLK_DMA_I2C2_SCL 0x04000020 + SC_P_GPT1_CAPTURE_DMA_I2C2_SDA 0x04000020 >; }; /* Apalis I2C3 (CAM) */ pinctrl_lpi2c3: lpi2c3grp { fsl,pins = < - SC_P_SIM0_PD_DMA_I2C3_SCL 0xc600004c - SC_P_SIM0_POWER_EN_DMA_I2C3_SDA 0xc600004c + SC_P_SIM0_PD_DMA_I2C3_SCL 0x04000020 + SC_P_SIM0_POWER_EN_DMA_I2C3_SDA 0x04000020 >; }; |