ARM: dts: imx8: apalis-imx8qm: alphabetically re-order nodes

Alphabetically re-order device tree nodes.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

1 files changed, 777 insertions, 778 deletions

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
index 939c0ab5c40c..1787d29996ad 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
@@ -161,51 +161,262 @@
 	status = "okay";
 };
 
+&adc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc0>;
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
+&adc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc1>;
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
 &amix {
 	status = "okay";
 };
 
-&sai1 {
-	assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
-			  <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
-			  <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
-			  <&clk IMX8QM_AUD_SAI_1_MCLK>;
-	assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
-	#sound-dai-cells = <0>;
+&asrc0 {
+	fsl,asrc-rate = <48000>;
+	status = "okay";
+};
+
+&dpr1_channel1 {
+	status = "okay";
+};
+
+&dpr1_channel2 {
+	status = "okay";
+};
+
+&dpr1_channel3 {
+	status = "okay";
+};
+
+&dpr2_channel1 {
+	status = "okay";
+};
+
+&dpr2_channel2 {
+	status = "okay";
+};
+
+&dpr2_channel3 {
+	status = "okay";
+};
+
+&dpr3_channel1 {
+	status = "okay";
+};
+
+&dpr3_channel2 {
+	status = "okay";
+};
+
+&dpr3_channel3 {
+	status = "okay";
+};
+
+&dpr4_channel1 {
+	status = "okay";
+};
+
+&dpr4_channel2 {
+	status = "okay";
+};
+
+&dpr4_channel3 {
+	status = "okay";
+};
+
+&dpu1 {
+	status = "okay";
+};
+
+&dpu2 {
+	status = "okay";
+};
+
+/* Apalis GLAN */
+&fec1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_sai1>;
+	pinctrl-0 = <&pinctrl_fec1>;
+	fsl,magic-packet;
+	fsl,rgmii_rxc_dly;
+	fsl,rgmii_txc_dly;
+	phy-handle = <&ethphy0>;
+	phy-mode = "rgmii";
+	phy-reset-duration = <10>;
+	phy-reset-gpios = <&gpio1 11 1>;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@7 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <7>;
+		};
+	};
 };
 
-&sai6 {
-	assigned-clocks = <&clk IMX8QM_ACM_SAI6_MCLK_SEL>,
-			<&clk IMX8QM_AUD_PLL1_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK1_DIV>,
-			<&clk IMX8QM_AUD_SAI_6_MCLK>;
-	assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>;
-	assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
-	fsl,sai-asynchronous;
-	fsl,txm-rxs;
+/* Apalis CAN1 */
+&flexcan1 {
+	/* define the following property to disable CAN-FD mode */
+	/* disable-fd-mode; */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	/* xceiver-supply = <&reg_can_stby>; */
 	status = "okay";
 };
 
-&sai7 {
-	assigned-clocks = <&clk IMX8QM_ACM_SAI7_MCLK_SEL>,
-			<&clk IMX8QM_AUD_PLL1_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK1_DIV>,
-			<&clk IMX8QM_AUD_SAI_7_MCLK>;
-	assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>;
-	assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
-	fsl,sai-asynchronous;
-	fsl,txm-rxs;
+/* Apalis CAN2 */
+&flexcan2 {
+	/* define the following property to disable CAN-FD mode */
+	/* disable-fd-mode; */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	/* xceiver-supply = <&reg_can_stby>; */
 	status = "okay";
 };
 
-&sai_hdmi_rx {
-	fsl,sai-asynchronous;
-	status = "disabled";
+&gpu_3d0 {
+	status = "okay";
+};
+
+&gpu_3d1 {
+	status = "okay";
+};
+
+/* Apalis HDMI1 */
+&hdmi {
+	compatible = "fsl,imx8qm-hdmi";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_ctrl>;
+	assigned-clocks = <&clk IMX8QM_HDMI_PXL_SEL>,
+			  <&clk IMX8QM_HDMI_PXL_LINK_SEL>,
+			  <&clk IMX8QM_HDMI_PXL_MUX_SEL>;
+	assigned-clock-parents = <&clk IMX8QM_HDMI_AV_PLL_CLK>,
+				 <&clk IMX8QM_HDMI_AV_PLL_CLK>,
+				 <&clk IMX8QM_HDMI_AV_PLL_CLK>;
+	ddc-i2c-bus = <&i2c0>;
+	fsl,cec;
+	hdmi-ctrl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
+/* Apalis I2C2 (DDC) */
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c0>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
+/* On-module I2C */
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c1>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <100000>;
+	status = "okay";
+
+	/* SGTL5000 */
+	sgtl5000: codec@a {
+		compatible = "fsl,sgtl5000";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sgtl5000>;
+		#sound-dai-cells = <0>;
+		assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+				  <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+				  <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
+				  <&clk IMX8QM_AUD_MCLKOUT0>;
+		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
+		clocks = <&clk IMX8QM_AUD_MCLKOUT0>;
+		power-domains = <&pd_mclk_out0>;
+		reg = <0x0a>;
+		VDDA-supply = <&reg_module_3v3_avdd>;
+		VDDD-supply = <&reg_vref_1v8>;
+		VDDIO-supply = <&reg_module_3v3>;
+	};
+
+	/* USB3503A */
+	usb3503@08 {
+		compatible = "smsc,usb3503a";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb3503a>;
+		connect-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+		initial-mode = <1>;
+		intn-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+		refclk-frequency = <25000000>;
+		reg = <0x08>;
+		reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+	};
+};
+
+/* Apalis I2C1 */
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c2>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <100000>;
+	status = "okay";
+
+	/* M41T0M6 real time clock on carrier board */
+	rtc_i2c: rtc@68 {
+		compatible = "st,m41t0";
+		reg = <0x68>;
+	};
+};
+
+/* Apalis I2C3 (CAM) */
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c3>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <100000>;
+	status = "okay";
+
+	ov5640_mipi@3c {
+		compatible = "ovti,ov5640_mipi";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio12>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+		pwn-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		reg = <0x3c>;
+		rst-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+		virtual-channel;
+		status = "okay";
+
+		port {
+			ov5640_ep: endpoint {
+				data-lanes = <1 2>;
+				remote-endpoint = <&mipi_csi1_ep>;
+			};
+		};
+	};
+};
+
+&imx8_gpu_ss {
+	status = "okay";
+};
+
+&intmux_cm40 {
+	status = "okay";
+};
+
+&intmux_cm41 {
+	status = "okay";
 };
 
 &iomuxc {
@@ -249,10 +460,83 @@
 			>;
 		};
 
-		/* On-module SGTL5000 SYS_MCLK */
-		pinctrl_sgtl5000: sgtl5000grp {
+		/* Apalis BKL_ON */
+		pinctrl_gpio_bkl_on: gpio-bkl-on {
 			fsl,pins = <
-				SC_P_MCLK_OUT0_AUD_ACM_MCLK_OUT0	0xc600004c
+				SC_P_LVDS0_GPIO00_LSIO_GPIO1_IO04	0x00000021
+			>;
+		};
+
+		/* Apalis BKL1_PWM */
+		pinctrl_pwm_bkl: pwmbklgrp {
+			fsl,pins = <
+				SC_P_LVDS1_GPIO00_LVDS1_PWM0_OUT	0x00000020
+			>;
+		};
+
+		/* Apalis CAM1 */
+		pinctrl_cam1_gpios: cam1gpiosgrp {
+			fsl,pins = <
+				/* Apalis CAM1_D7 */
+				SC_P_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20	0x00000021
+				/* Apalis CAM1_D6 */
+				SC_P_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21	0x00000021
+				/* Apalis CAM1_D5 */
+				SC_P_ESAI0_TX0_LSIO_GPIO2_IO26		0x00000021
+				/* Apalis CAM1_D4 */
+				SC_P_ESAI0_TX1_LSIO_GPIO2_IO27		0x00000021
+				/* Apalis CAM1_D3 */
+				SC_P_ESAI0_TX2_RX3_LSIO_GPIO2_IO28	0x00000021
+				/* Apalis CAM1_D2 */
+				SC_P_ESAI0_TX3_RX2_LSIO_GPIO2_IO29	0x00000021
+				/* Apalis CAM1_D1 */
+				SC_P_ESAI0_TX4_RX1_LSIO_GPIO2_IO30	0x00000021
+				/* Apalis CAM1_D0 */
+				SC_P_ESAI0_TX5_RX0_LSIO_GPIO2_IO31	0x00000021
+				/* Apalis CAM1_PCLK */
+				SC_P_MCLK_IN0_LSIO_GPIO3_IO00		0x00000021
+				/* Apalis CAM1_MCLK */
+				SC_P_SPI3_SDO_LSIO_GPIO2_IO18		0x00000021
+				/* Apalis CAM1_VSYNC */
+				SC_P_ESAI0_SCKR_LSIO_GPIO2_IO24		0x00000021
+				/* Apalis CAM1_HSYNC */
+				SC_P_ESAI0_SCKT_LSIO_GPIO2_IO25		0x00000021
+			>;
+		};
+
+		/* Apalis CAN1 */
+		pinctrl_flexcan1: flexcan0grp {
+			fsl,pins = <
+				SC_P_FLEXCAN0_TX_DMA_FLEXCAN0_TX	0x21
+				SC_P_FLEXCAN0_RX_DMA_FLEXCAN0_RX	0x21
+			>;
+		};
+
+		/* Apalis CAN2 */
+		pinctrl_flexcan2: flexcan1grp {
+			fsl,pins = <
+				SC_P_FLEXCAN1_TX_DMA_FLEXCAN1_TX	0x21
+				SC_P_FLEXCAN1_RX_DMA_FLEXCAN1_RX	0x21
+			>;
+		};
+
+		/* Apalis DAP1 */
+		pinctrl_dap1_gpios: dap1gpiosgrp {
+			fsl,pins = <
+				/* Apalis DAP1_MCLK */
+				SC_P_SPI3_SDI_LSIO_GPIO2_IO19			0x00000021
+				/* Apalis DAP1_D_OUT */
+				SC_P_SAI1_RXC_LSIO_GPIO3_IO12			0x00000021
+				/* Apalis DAP1_RESET */
+				SC_P_ESAI1_SCKT_LSIO_GPIO2_IO07			0x00000021
+				/* Apalis DAP1_BIT_CLK */
+				SC_P_SPI0_CS1_LSIO_GPIO3_IO06			0x00000021
+				/* Apalis DAP1_D_IN */
+				SC_P_SAI1_RXFS_LSIO_GPIO3_IO14			0x00000021
+				/* Apalis DAP1_SYNC */
+				SC_P_SPI2_CS1_LSIO_GPIO3_IO11			0x00000021
+				/* On-module Wi-Fi_I2S_EN# */
+				SC_P_ESAI1_TX5_RX0_LSIO_GPIO2_IO13		0x00000021
 			>;
 		};
 
@@ -300,41 +584,11 @@
 			>;
 		};
 
-		/* Apalis WAKE1_MICO */
-		pinctrl_gpio_keys: gpio-keys {
-			fsl,pins = <
-				SC_P_SPI3_CS0_LSIO_GPIO2_IO20		0x06000021
-			>;
-		};
-
-		/* On-module Micrel KSZ9031 Gigabit Ethernet PHY for Apalis GLAN */
-		pinctrl_fec1: fec1grp {
-			fsl,pins = <
-				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD	0x000014a0 /* Use pads in 3.3V mode */
-				SC_P_ENET0_MDC_CONN_ENET0_MDC			0x06000020
-				SC_P_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
-				SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x06000020
-				SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC	0x06000020
-				SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x06000020
-				SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x06000020
-				SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2	0x06000020
-				SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3	0x06000020
-				SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC	0x06000020
-				SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x06000020
-				SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x06000020
-				SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x06000020
-				SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2	0x06000020
-				SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3	0x06000020
-				SC_P_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020
-				/* On-module ETH_RESET# */
-				SC_P_LVDS1_GPIO01_LSIO_GPIO1_IO11		0x06000020
-			>;
-		};
-
-		/* Apalis BKL_ON */
-		pinctrl_gpio_bkl_on: gpio-bkl-on {
+		/* Apalis I2C1 */
+		pinctrl_lpi2c2: lpi2c2grp {
 			fsl,pins = <
-				SC_P_LVDS0_GPIO00_LSIO_GPIO1_IO04	0x00000021
+				SC_P_GPT1_CLK_DMA_I2C2_SCL		0x04000020
+				SC_P_GPT1_CAPTURE_DMA_I2C2_SDA		0x04000020
 			>;
 		};
 
@@ -346,60 +600,11 @@
 			>;
 		};
 
-		/* On-module HDMI_CTRL */
-		pinctrl_hdmi_ctrl: hdmictrlgrp {
-			fsl,pins = <
-				SC_P_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0x00000061
-			>;
-		};
-
-		/* Apalis CAM1 */
-		pinctrl_cam1_gpios: cam1gpiosgrp {
-			fsl,pins = <
-				/* Apalis CAM1_D7 */
-				SC_P_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20	0x00000021
-				/* Apalis CAM1_D6 */
-				SC_P_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21	0x00000021
-				/* Apalis CAM1_D5 */
-				SC_P_ESAI0_TX0_LSIO_GPIO2_IO26		0x00000021
-				/* Apalis CAM1_D4 */
-				SC_P_ESAI0_TX1_LSIO_GPIO2_IO27		0x00000021
-				/* Apalis CAM1_D3 */
-				SC_P_ESAI0_TX2_RX3_LSIO_GPIO2_IO28	0x00000021
-				/* Apalis CAM1_D2 */
-				SC_P_ESAI0_TX3_RX2_LSIO_GPIO2_IO29	0x00000021
-				/* Apalis CAM1_D1 */
-				SC_P_ESAI0_TX4_RX1_LSIO_GPIO2_IO30	0x00000021
-				/* Apalis CAM1_D0 */
-				SC_P_ESAI0_TX5_RX0_LSIO_GPIO2_IO31	0x00000021
-				/* Apalis CAM1_PCLK */
-				SC_P_MCLK_IN0_LSIO_GPIO3_IO00		0x00000021
-				/* Apalis CAM1_MCLK */
-				SC_P_SPI3_SDO_LSIO_GPIO2_IO18		0x00000021
-				/* Apalis CAM1_VSYNC */
-				SC_P_ESAI0_SCKR_LSIO_GPIO2_IO24		0x00000021
-				/* Apalis CAM1_HSYNC */
-				SC_P_ESAI0_SCKT_LSIO_GPIO2_IO25		0x00000021
-			>;
-		};
-
-		/* Apalis DAP1 */
-		pinctrl_dap1_gpios: dap1gpiosgrp {
+		/* Apalis I2C3 (CAM) */
+		pinctrl_lpi2c3: lpi2c3grp {
 			fsl,pins = <
-				/* Apalis DAP1_MCLK */
-				SC_P_SPI3_SDI_LSIO_GPIO2_IO19			0x00000021
-				/* Apalis DAP1_D_OUT */
-				SC_P_SAI1_RXC_LSIO_GPIO3_IO12			0x00000021
-				/* Apalis DAP1_RESET */
-				SC_P_ESAI1_SCKT_LSIO_GPIO2_IO07			0x00000021
-				/* Apalis DAP1_BIT_CLK */
-				SC_P_SPI0_CS1_LSIO_GPIO3_IO06			0x00000021
-				/* Apalis DAP1_D_IN */
-				SC_P_SAI1_RXFS_LSIO_GPIO3_IO14			0x00000021
-				/* Apalis DAP1_SYNC */
-				SC_P_SPI2_CS1_LSIO_GPIO3_IO11			0x00000021
-				/* On-module Wi-Fi_I2S_EN# */
-				SC_P_ESAI1_TX5_RX0_LSIO_GPIO2_IO13		0x00000021
+				SC_P_SIM0_PD_DMA_I2C3_SCL		0x04000020
+				SC_P_SIM0_POWER_EN_DMA_I2C3_SDA		0x04000020
 			>;
 		};
 
@@ -413,6 +618,16 @@
 			>;
 		};
 
+		/* Apalis LCD1_G6+7 */
+		pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp {
+			fsl,pins = <
+				/* Apalis LCD1_G6 */
+				SC_P_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12		0x00000021
+				/* Apalis LCD1_G7 */
+				SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13		0x00000021
+			>;
+		};
+
 		/* Apalis LCD1_ */
 		pinctrl_fec2_gpios: fec2gpiosgrp {
 			fsl,pins = <
@@ -446,37 +661,6 @@
 			>;
 		};
 
-		/* Apalis TS_2 */
-		pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpio {
-			fsl,pins = <
-				SC_P_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06		0x00000021
-			>;
-		};
-
-		/* Apalis LCD1_G6+7 */
-		pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp {
-			fsl,pins = <
-				/* Apalis LCD1_G6 */
-				SC_P_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12		0x00000021
-				/* Apalis LCD1_G7 */
-				SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13		0x00000021
-			>;
-		};
-
-		/* Apalis TS_4 */
-		pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp {
-			fsl,pins = <
-				SC_P_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22		0x00000021
-			>;
-		};
-
-		/* Apalis TS_1 */
-		pinctrl_mlb_gpios: mlbgpiosgrp {
-			fsl,pins = <
-				SC_P_MLB_CLK_LSIO_GPIO3_IO27			0x00000021
-			>;
-		};
-
 		/* Apalis LCD1_ */
 		pinctrl_qspi1a_gpios: qspi1agpiosgrp {
 			fsl,pins = <
@@ -513,41 +697,152 @@
 			>;
 		};
 
-		/* Apalis TS_6 */
-		pinctrl_usdhc1_gpios: usdhc1gpiosgrp {
+		/* Apalis MMC1_CD# */
+		pinctrl_mmc1_cd: mmc1cdgrp {
 			fsl,pins = <
-				SC_P_USDHC1_STROBE_LSIO_GPIO5_IO23		0x00000021
+				SC_P_ESAI1_TX1_LSIO_GPIO2_IO09		0x00000021
 			>;
 		};
 
-		/* Apalis TS_3 */
-		pinctrl_mipi_dsi_0_1_en: mipi_dsi_0_1_en {
+		/* Apalis MMC1 */
+		pinctrl_usdhc2: usdhc2grp {
 			fsl,pins = <
-				SC_P_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07		0x00000021
+				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
+				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
+				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000021
+				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000021
+				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000021
+				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000021
+				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000021
+				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000021
+				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000021
+				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000021
+				/* On-module PMIC use */
+				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000021
 			>;
 		};
 
-		/* On-module I2C */
-		pinctrl_lpi2c1: lpi2c1grp {
+		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 			fsl,pins = <
-				SC_P_GPT0_CLK_DMA_I2C1_SCL		0x04000020
-				SC_P_GPT0_CAPTURE_DMA_I2C1_SDA		0x04000020
+				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
+				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
+				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
+				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
+				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
+				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
+				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
+				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
+				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
+				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
+				/* On-module PMIC use */
+				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
 			>;
 		};
 
-		/* Apalis I2C1 */
-		pinctrl_lpi2c2: lpi2c2grp {
+		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 			fsl,pins = <
-				SC_P_GPT1_CLK_DMA_I2C2_SCL		0x04000020
-				SC_P_GPT1_CAPTURE_DMA_I2C2_SDA		0x04000020
+				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
+				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
+				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
+				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
+				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
+				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
+				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
+				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
+				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
+				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
+				/* On-module PMIC use */
+				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
 			>;
 		};
 
-		/* Apalis I2C3 (CAM) */
-		pinctrl_lpi2c3: lpi2c3grp {
+		/* Apalis PWM1 */
+		pinctrl_pwm2: pwm2grp {
 			fsl,pins = <
-				SC_P_SIM0_PD_DMA_I2C3_SCL		0x04000020
-				SC_P_SIM0_POWER_EN_DMA_I2C3_SDA		0x04000020
+				SC_P_GPT1_COMPARE_LSIO_PWM2_OUT		0x00000020
+			>;
+		};
+
+		/* Apalis PWM2 */
+		pinctrl_pwm3: pwm3grp {
+			fsl,pins = <
+				SC_P_GPT0_COMPARE_LSIO_PWM3_OUT		0x00000020
+			>;
+		};
+
+		/* Apalis PWM3 */
+		pinctrl_pwm0: pwm0grp {
+			fsl,pins = <
+				SC_P_UART0_RTS_B_LSIO_PWM0_OUT		0x00000020
+			>;
+		};
+
+		/* Apalis PWM4 */
+		pinctrl_pwm1: pwm1grp {
+			fsl,pins = <
+				SC_P_UART0_CTS_B_LSIO_PWM1_OUT		0x00000020
+			>;
+		};
+
+		/* Apalis SATA1_ACT# */
+		pinctrl_sata1_act: sata1actgrp {
+			fsl,pins = <
+				SC_P_ESAI1_TX0_LSIO_GPIO2_IO08		0x00000021
+			>;
+		};
+
+		/* Apalis SD1_CD# */
+		pinctrl_sd1_cd: sd1cdgrp {
+			fsl,pins = <
+				SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12	0x00000021
+			>;
+		};
+
+		/* Apalis SD1 */
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000041
+				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000021
+				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000021
+				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000021
+				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000021
+				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000021
+				/* On-module PMIC use */
+				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000021
+			>;
+		};
+
+		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+			fsl,pins = <
+				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000040
+				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000020
+				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000020
+				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000020
+				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000020
+				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000020
+				/* On-module PMIC use */
+				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000020
+			>;
+		};
+
+		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+			fsl,pins = <
+				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000040
+				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000020
+				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000020
+				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000020
+				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000020
+				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000020
+				/* On-module PMIC use */
+				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000020
+			>;
+		};
+
+		/* Apalis SPDIF */
+		pinctrl_spdif0: spdif0grp {
+			fsl,pins = <
+				SC_P_SPDIF0_TX_AUD_SPDIF0_TX	0xc6000040
+				SC_P_SPDIF0_RX_AUD_SPDIF0_RX	0xc6000040
 			>;
 		};
 
@@ -571,11 +866,38 @@
 			>;
 		};
 
-		/* Apalis UART3 */
-		pinctrl_lpuart0: lpuart0grp {
+		/* Apalis TS_1 */
+		pinctrl_mlb_gpios: mlbgpiosgrp {
 			fsl,pins = <
-				SC_P_UART0_RX_DMA_UART0_RX		0x06000020
-				SC_P_UART0_TX_DMA_UART0_TX		0x06000020
+				SC_P_MLB_CLK_LSIO_GPIO3_IO27			0x00000021
+			>;
+		};
+
+		/* Apalis TS_2 */
+		pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpio {
+			fsl,pins = <
+				SC_P_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06		0x00000021
+			>;
+		};
+
+		/* Apalis TS_3 */
+		pinctrl_mipi_dsi_0_1_en: mipi_dsi_0_1_en {
+			fsl,pins = <
+				SC_P_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07		0x00000021
+			>;
+		};
+
+		/* Apalis TS_4 */
+		pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp {
+			fsl,pins = <
+				SC_P_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22		0x00000021
+			>;
+		};
+
+		/* Apalis TS_6 */
+		pinctrl_usdhc1_gpios: usdhc1gpiosgrp {
+			fsl,pins = <
+				SC_P_USDHC1_STROBE_LSIO_GPIO5_IO23		0x00000021
 			>;
 		};
 
@@ -603,14 +925,6 @@
 			>;
 		};
 
-		/* Apalis UART4 */
-		pinctrl_lpuart2: lpuart2grp {
-			fsl,pins = <
-				SC_P_LVDS0_I2C1_SCL_DMA_UART2_TX	0x06000020
-				SC_P_LVDS0_I2C1_SDA_DMA_UART2_RX	0x06000020
-			>;
-		};
-
 		/* Apalis UART2 */
 		pinctrl_lpuart3: lpuart3grp {
 			fsl,pins = <
@@ -621,38 +935,50 @@
 			>;
 		};
 
-		/* Apalis PWM3 */
-		pinctrl_pwm0: pwm0grp {
+		/* Apalis UART3 */
+		pinctrl_lpuart0: lpuart0grp {
 			fsl,pins = <
-				SC_P_UART0_RTS_B_LSIO_PWM0_OUT		0x00000020
+				SC_P_UART0_RX_DMA_UART0_RX		0x06000020
+				SC_P_UART0_TX_DMA_UART0_TX		0x06000020
 			>;
 		};
 
-		/* Apalis PWM4 */
-		pinctrl_pwm1: pwm1grp {
+		/* Apalis UART4 */
+		pinctrl_lpuart2: lpuart2grp {
 			fsl,pins = <
-				SC_P_UART0_CTS_B_LSIO_PWM1_OUT		0x00000020
+				SC_P_LVDS0_I2C1_SCL_DMA_UART2_TX	0x06000020
+				SC_P_LVDS0_I2C1_SDA_DMA_UART2_RX	0x06000020
 			>;
 		};
 
-		/* Apalis PWM1 */
-		pinctrl_pwm2: pwm2grp {
+		/* Apalis USBH_EN */
+		pinctrl_usbh_en: usbhen {
 			fsl,pins = <
-				SC_P_GPT1_COMPARE_LSIO_PWM2_OUT		0x00000020
+				SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04	0x00000021
 			>;
 		};
 
-		/* Apalis PWM2 */
-		pinctrl_pwm3: pwm3grp {
+		/* Apalis USBH_OC# */
+		pinctrl_gpio_usbh_oc_n: gpiousbhocn {
 			fsl,pins = <
-				SC_P_GPT0_COMPARE_LSIO_PWM3_OUT		0x00000020
+				SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06	0x04000021
 			>;
 		};
 
-		/* Apalis BKL1_PWM */
-		pinctrl_pwm_bkl: pwmbklgrp {
+		/* Apalis USBO1 */
+		pinctrl_usbotg1: usbotg1 {
 			fsl,pins = <
-				SC_P_LVDS1_GPIO00_LVDS1_PWM0_OUT	0x00000020
+				/* Apalis USBO1_EN */
+				SC_P_USB_SS3_TC0_CONN_USB_OTG1_PWR	0x00000021
+				/* Apalis USBO1_OC# */
+				SC_P_USB_SS3_TC2_CONN_USB_OTG1_OC	0x04000021
+			>;
+		};
+
+		/* Apalis WAKE1_MICO */
+		pinctrl_gpio_keys: gpio-keys {
+			fsl,pins = <
+				SC_P_SPI3_CS0_LSIO_GPIO2_IO20		0x06000021
 			>;
 		};
 
@@ -708,140 +1034,59 @@
 			>;
 		};
 
-		/* Apalis SATA1_ACT# */
-		pinctrl_sata1_act: sata1actgrp {
-			fsl,pins = <
-				SC_P_ESAI1_TX0_LSIO_GPIO2_IO08		0x00000021
-			>;
-		};
-
-		/* Apalis SPDIF */
-		pinctrl_spdif0: spdif0grp {
-			fsl,pins = <
-				SC_P_SPDIF0_TX_AUD_SPDIF0_TX	0xc6000040
-				SC_P_SPDIF0_RX_AUD_SPDIF0_RX	0xc6000040
-			>;
-		};
-
-		/* Apalis MMC1_CD# */
-		pinctrl_mmc1_cd: mmc1cdgrp {
-			fsl,pins = <
-				SC_P_ESAI1_TX1_LSIO_GPIO2_IO09		0x00000021
-			>;
-		};
-
-		/* Apalis MMC1 */
-		pinctrl_usdhc2: usdhc2grp {
-			fsl,pins = <
-				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
-				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
-				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000021
-				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000021
-				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000021
-				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000021
-				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000021
-				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000021
-				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000021
-				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000021
-				/* On-module PMIC use */
-				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000021
-			>;
-		};
-
-		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
-			fsl,pins = <
-				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
-				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
-				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
-				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
-				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
-				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
-				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
-				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
-				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
-				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
-				/* On-module PMIC use */
-				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
-			>;
-		};
-
-		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
-			fsl,pins = <
-				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
-				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
-				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
-				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
-				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
-				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
-				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
-				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
-				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
-				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
-				/* On-module PMIC use */
-				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
-			>;
-		};
-
-		/* Apalis SD1_CD# */
-		pinctrl_sd1_cd: sd1cdgrp {
-			fsl,pins = <
-				SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12	0x00000021
-			>;
-		};
-
-		/* Apalis SD1 */
-		pinctrl_usdhc3: usdhc3grp {
+		/* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */
+		pinctrl_fec1: fec1grp {
 			fsl,pins = <
-				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000041
-				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000021
-				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000021
-				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000021
-				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000021
-				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000021
-				/* On-module PMIC use */
-				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000021
+				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD	0x000014a0 /* Use pads in 3.3V mode */
+				SC_P_ENET0_MDC_CONN_ENET0_MDC			0x06000020
+				SC_P_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
+				SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x06000020
+				SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC	0x06000020
+				SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x06000020
+				SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x06000020
+				SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2	0x06000020
+				SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3	0x06000020
+				SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC	0x06000020
+				SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x06000020
+				SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x06000020
+				SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x06000020
+				SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2	0x06000020
+				SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3	0x06000020
+				SC_P_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020
+				/* On-module ETH_RESET# */
+				SC_P_LVDS1_GPIO01_LSIO_GPIO1_IO11		0x06000020
 			>;
 		};
 
-		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+		/* On-module HDMI_CTRL */
+		pinctrl_hdmi_ctrl: hdmictrlgrp {
 			fsl,pins = <
-				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000040
-				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000020
-				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000020
-				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000020
-				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000020
-				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000020
-				/* On-module PMIC use */
-				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000020
+				SC_P_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0x00000061
 			>;
 		};
 
-		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+		/* On-module I2C */
+		pinctrl_lpi2c1: lpi2c1grp {
 			fsl,pins = <
-				SC_P_USDHC2_CLK_CONN_USDHC2_CLK		0x06000040
-				SC_P_USDHC2_CMD_CONN_USDHC2_CMD		0x00000020
-				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0	0x00000020
-				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1	0x00000020
-				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2	0x00000020
-				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3	0x00000020
-				/* On-module PMIC use */
-				SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT	0x00000020
+				SC_P_GPT0_CLK_DMA_I2C1_SCL		0x04000020
+				SC_P_GPT0_CAPTURE_DMA_I2C1_SDA		0x04000020
 			>;
 		};
 
-		/* Apalis CAN1 */
-		pinctrl_flexcan1: flexcan0grp {
+		/* On-module I2S SGTL5000 for Apalis Analogue Audio */
+		pinctrl_sai1: sai1grp {
 			fsl,pins = <
-				SC_P_FLEXCAN0_TX_DMA_FLEXCAN0_TX	0x21
-				SC_P_FLEXCAN0_RX_DMA_FLEXCAN0_RX	0x21
+				SC_P_SAI1_TXD_AUD_SAI1_TXD		0xc600006c
+				SC_P_SAI1_RXD_AUD_SAI1_RXD		0xc600004c
+				SC_P_SAI1_TXC_AUD_SAI1_TXC		0xc600004c
+				SC_P_SAI1_TXFS_AUD_SAI1_TXFS		0xc600004c
 			>;
 		};
 
-		/* Apalis CAN2 */
-		pinctrl_flexcan2: flexcan1grp {
+		/* On-module I2S SGTL5000 SYS_MCLK */
+		pinctrl_sgtl5000: sgtl5000grp {
 			fsl,pins = <
-				SC_P_FLEXCAN1_TX_DMA_FLEXCAN1_TX	0x21
-				SC_P_FLEXCAN1_RX_DMA_FLEXCAN1_RX	0x21
+				SC_P_MCLK_OUT0_AUD_ACM_MCLK_OUT0	0xc600004c
 			>;
 		};
 
@@ -861,41 +1106,19 @@
 			>;
 		};
 
-		/* On-module I2S to SGTL5000 for Apalis Analogue Audio */
-		pinctrl_sai1: sai1grp {
-			fsl,pins = <
-				SC_P_SAI1_TXD_AUD_SAI1_TXD		0xc600006c
-				SC_P_SAI1_RXD_AUD_SAI1_RXD		0xc600004c
-				SC_P_SAI1_TXC_AUD_SAI1_TXC		0xc600004c
-				SC_P_SAI1_TXFS_AUD_SAI1_TXFS		0xc600004c
-			>;
-		};
-
-		/* Apalis USBO1 */
-		pinctrl_usbotg1: usbotg1 {
-			fsl,pins = <
-				/* Apalis USBO1_EN */
-				SC_P_USB_SS3_TC0_CONN_USB_OTG1_PWR	0x00000021
-				/* Apalis USBO1_OC# */
-				SC_P_USB_SS3_TC2_CONN_USB_OTG1_OC	0x04000021
-			>;
-		};
-
-		/* Apalis USBH_EN */
-		pinctrl_usbh_en: usbhen {
-			fsl,pins = <
-				SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04	0x00000021
-			>;
-		};
-
-		/* Apalis USBH_OC# */
-		pinctrl_gpio_usbh_oc_n: gpiousbhocn {
+		/* On-module USB HSIC HUB */
+		pinctrl_usb3503a: usb3503agrp {
 			fsl,pins = <
-				SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06	0x04000021
+				/* On-module HSIC_HUB_CONNECT */
+				SC_P_SCU_GPIO0_03_LSIO_GPIO0_IO31		0x00000021
+				/* On-module HSIC_INT_N */
+				SC_P_SCU_GPIO0_05_LSIO_GPIO1_IO01		0x00000021
+				/* On-module HSIC_RESET_N */
+				SC_P_SCU_GPIO0_06_LSIO_GPIO1_IO02		0x00000021
 			>;
 		};
 
-		/* On-module HSIC HUB (idle) */
+		/* On-module USB HSIC HUB (idle) */
 		pinctrl_usb_hsic_idle: usbh1_1 {
 			fsl,pins = <
 				SC_P_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA		0xc60000c5
@@ -903,25 +1126,13 @@
 			>;
 		};
 
-		/* On-module HSIC HUB (active) */
+		/* On-module USB HSIC HUB (active) */
 		pinctrl_usb_hsic_active: usbh1_2 {
 			fsl,pins = <
 				SC_P_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE	0xc60000d5
 			>;
 		};
 
-		/* On-module HSIC HUB */
-		pinctrl_usb3503a: usb3503agrp {
-			fsl,pins = <
-				/* On-module HSIC_HUB_CONNECT */
-				SC_P_SCU_GPIO0_03_LSIO_GPIO0_IO31		0x00000021
-				/* On-module HSIC_INT_N */
-				SC_P_SCU_GPIO0_05_LSIO_GPIO1_IO01		0x00000021
-				/* On-module HSIC_RESET_N */
-				SC_P_SCU_GPIO0_06_LSIO_GPIO1_IO02		0x00000021
-			>;
-		};
-
 		/* On-module Wi-Fi */
 		pinctrl_wifi: wifigrp {
 			fsl,pins = <
@@ -936,295 +1147,79 @@
 	};
 };
 
-&adc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_adc0>;
-	vref-supply = <&reg_vref_1v8>;
-	status = "okay";
-};
-
-&adc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_adc1>;
-	vref-supply = <&reg_vref_1v8>;
-	status = "okay";
-};
-
-&asrc0 {
-	fsl,asrc-rate = <48000>;
-	status = "okay";
-};
-
-/* Apalis PWM3, MXM3 pin 6 */
-&pwm0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm0>;
-	status = "okay";
-};
-
-/* Apalis PWM4, MXM3 pin 8 */
-&pwm1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm1>;
-	status = "okay";
-};
-
-/* Apalis PWM1, MXM3 pin 2 */
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm2>;
-	status = "okay";
-};
-
-/* Apalis PWM2, MXM3 pin 4 */
-&pwm3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm3>;
-	status = "okay";
-};
-
-/* Apalis BKL1_PWM */
-&lvds1_pwm {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm_bkl>;
-	status = "okay";
-};
-
-/* On-module eMMC */
-&usdhc1 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc1>;
-	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-/* Apalis MMC1 */
-&usdhc2 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_mmc1_cd>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_mmc1_cd>;
-	bus-width = <8>;
-	cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */
-	status = "okay";
-};
-
-/* Apalis SD1 */
-&usdhc3 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>;
-	pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>;
-	pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>;
-	bus-width = <4>;
-	cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */
-	status = "okay";
-};
-
-/* Apalis USBO1 */
-&usbotg1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usbotg1>;
-	adp-disable;
-	ci-disable-lpm;
-	hnp-disable;
-	power-polarity-active-high;
-	srp-disable;
-	status = "okay";
-};
-
-&usbphynop1 {
-	vbus-regulator = <&reg_usb_host_vbus>;
-};
-
-/* Apalis USBH4 SuperSpeed */
-&usbotg3 {
-	cdns3,usbphy = <&usbphynop1>;
-	dr_mode = "host";
+&irqsteer_hdmi {
 	status = "okay";
 };
 
-/* Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
-&usbh1 {
-	pinctrl-names = "idle", "active";
-	pinctrl-0 = <&pinctrl_usb_hsic_idle>;
-	pinctrl-1 = <&pinctrl_usb_hsic_active>;
-	adp-disable;
-	disable-over-current;
-	hnp-disable;
-	srp-disable;
-	vbus-supply = <&reg_usb_host_vbus>;
+&isi_0 {
 	status = "okay";
 };
 
-/* Apalis GLAN */
-&fec1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_fec1>;
-	fsl,magic-packet;
-	fsl,rgmii_rxc_dly;
-	fsl,rgmii_txc_dly;
-	phy-handle = <&ethphy0>;
-	phy-mode = "rgmii";
-	phy-reset-duration = <10>;
-	phy-reset-gpios = <&gpio1 11 1>;
+&isi_1 {
 	status = "okay";
-
-	mdio {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ethphy0: ethernet-phy@7 {
-			compatible = "ethernet-phy-ieee802.3-c22";
-			reg = <7>;
-		};
-	};
 };
 
-/* Apalis CAN1 */
-&flexcan1 {
-	/* define the following property to disable CAN-FD mode */
-	/* disable-fd-mode; */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan1>;
-	/* xceiver-supply = <&reg_can_stby>; */
+&isi_2 {
 	status = "okay";
 };
 
-/* Apalis CAN2 */
-&flexcan2 {
-	/* define the following property to disable CAN-FD mode */
-	/* disable-fd-mode; */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan2>;
-	/* xceiver-supply = <&reg_can_stby>; */
+&isi_3 {
 	status = "okay";
 };
 
-&irqsteer_hdmi {
+&isi_4 {
 	status = "okay";
 };
 
-/* Apalis HDMI1 */
-&hdmi {
-	compatible = "fsl,imx8qm-hdmi";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hdmi_ctrl>;
-	assigned-clocks = <&clk IMX8QM_HDMI_PXL_SEL>,
-			  <&clk IMX8QM_HDMI_PXL_LINK_SEL>,
-			  <&clk IMX8QM_HDMI_PXL_MUX_SEL>;
-	assigned-clock-parents = <&clk IMX8QM_HDMI_AV_PLL_CLK>,
-				 <&clk IMX8QM_HDMI_AV_PLL_CLK>,
-				 <&clk IMX8QM_HDMI_AV_PLL_CLK>;
-	ddc-i2c-bus = <&i2c0>;
-	fsl,cec;
-	hdmi-ctrl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+&isi_5 {
 	status = "okay";
 };
 
-/* Apalis I2C2 (DDC) */
-&i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_lpi2c0>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	clock-frequency = <100000>;
+&isi_6 {
 	status = "okay";
 };
 
-/* On-module I2C */
-&i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_lpi2c1>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	clock-frequency = <100000>;
+&isi_7 {
 	status = "okay";
-
-	/* SGTL5000 */
-	sgtl5000: codec@a {
-		compatible = "fsl,sgtl5000";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_sgtl5000>;
-		#sound-dai-cells = <0>;
-		assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
-				  <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
-				  <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
-				  <&clk IMX8QM_AUD_MCLKOUT0>;
-		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
-		clocks = <&clk IMX8QM_AUD_MCLKOUT0>;
-		power-domains = <&pd_mclk_out0>;
-		reg = <0x0a>;
-		VDDA-supply = <&reg_module_3v3_avdd>;
-		VDDD-supply = <&reg_vref_1v8>;
-		VDDIO-supply = <&reg_module_3v3>;
-	};
-
-	/* USB3503A */
-	usb3503@08 {
-		compatible = "smsc,usb3503a";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb3503a>;
-		connect-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
-		initial-mode = <1>;
-		intn-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
-		refclk-frequency = <25000000>;
-		reg = <0x08>;
-		reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
-	};
 };
 
-/* Apalis I2C1 */
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_lpi2c2>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	clock-frequency = <100000>;
+/* Apalis LVDS1 */
+//TBD: enabling breaks HDMI
+#if 0
+&ldb2_phy {
 	status = "okay";
-
-	/* M41T0M6 real time clock on carrier board */
-	rtc_i2c: rtc@68 {
-		compatible = "st,m41t0";
-		reg = <0x68>;
-	};
 };
 
-/* Apalis I2C3 (CAM) */
-&i2c3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_lpi2c3>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	clock-frequency = <100000>;
+&ldb2 {
+	fsl,dual-channel;
 	status = "okay";
 
-	ov5640_mipi@3c {
-		compatible = "ovti,ov5640_mipi";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpio12>;
-		mclk = <24000000>;
-		mclk_source = <0>;
-		pwn-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
-		reg = <0x3c>;
-		rst-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-		virtual-channel;
+	lvds-channel@0 {
+		fsl,data-mapping = "spwg";
+		fsl,data-width = <18>;
+		primary;
 		status = "okay";
 
-		port {
-			ov5640_ep: endpoint {
-				data-lanes = <1 2>;
-				remote-endpoint = <&mipi_csi1_ep>;
+		display-timings {
+			native-mode = <&timing_fullhd>;
+			timing_fullhd: 1920x1080 {
+				clock-frequency = <138500000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hback-porch = <80>;
+				hfront-porch = <48>;
+				vback-porch = <23>;
+				vfront-porch = <3>;
+				hsync-len = <32>;
+				vsync-len = <5>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <0>;
 			};
 		};
 	};
 };
-
-&pd_dma_lpuart1 {
-	debug_console;
-};
+#endif
 
 /* Apalis SPI1 */
 &lpspi0 {
@@ -1284,6 +1279,13 @@
 	status = "okay";
 };
 
+/* Apalis BKL1_PWM */
+&lvds1_pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm_bkl>;
+	status = "okay";
+};
+
 &mipi_csi_1 {
 	#address-cells = <1>;
 	#size-cells = <0>;
@@ -1301,52 +1303,57 @@
 	};
 };
 
-
-&isi_0 {
-	status = "okay";
-};
-
-&isi_1 {
-	status = "okay";
-};
-
-&isi_2 {
-	status = "okay";
-};
-
-&isi_3 {
-	status = "okay";
-};
-
-&isi_4 {
-	status = "okay";
-};
-
-&isi_5 {
+/* Apalis PCIE1 */
+&pciea{
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpio7>;
+	clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>,
+		 <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>,
+		 <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>,
+		 <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>,
+		 <&pcie_sata_refclk_gate>;
+	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
+	ext_osc = <1>;
+	max-link-speed = <1>;
+	reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
-&isi_6 {
+/* On-module Wi-Fi */
+&pcieb{
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcieb &pinctrl_wifi>;
+	clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>,
+		 <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>,
+		 <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>,
+		 <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>,
+		 <&pcie_sata_refclk_gate>;
+	/*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/
+	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
+	/*epdev_on-supply = <&epdev_on>;*/
+	ext_osc = <1>;
+	max-link-speed = <1>;
+	reset-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
-&isi_7 {
-	status = "okay";
+&pd_cm40_intmux {
+	early_power_on;
 };
 
-&gpu_3d0 {
-	status = "okay";
+&pd_cm41_intmux {
+	early_power_on;
 };
 
-&gpu_3d1 {
-	status = "okay";
+&pd_dma_lpuart1 {
+	debug_console;
 };
 
-&imx8_gpu_ss {
+&pixel_combiner1 {
 	status = "okay";
 };
 
-&pixel_combiner1 {
+&pixel_combiner2 {
 	status = "okay";
 };
 
@@ -1386,38 +1393,6 @@
 	status = "okay";
 };
 
-&dpr1_channel1 {
-	status = "okay";
-};
-
-&dpr1_channel2 {
-	status = "okay";
-};
-
-&dpr1_channel3 {
-	status = "okay";
-};
-
-&dpr2_channel1 {
-	status = "okay";
-};
-
-&dpr2_channel2 {
-	status = "okay";
-};
-
-&dpr2_channel3 {
-	status = "okay";
-};
-
-&dpu1 {
-	status = "okay";
-};
-
-&pixel_combiner2 {
-	status = "okay";
-};
-
 &prg10 {
 	status = "okay";
 };
@@ -1454,73 +1429,31 @@
 	status = "okay";
 };
 
-&dpr3_channel1 {
-	status = "okay";
-};
-
-&dpr3_channel2 {
-	status = "okay";
-};
-
-&dpr3_channel3 {
-	status = "okay";
-};
-
-&dpr4_channel1 {
-	status = "okay";
-};
-
-&dpr4_channel2 {
-	status = "okay";
-};
-
-&dpr4_channel3 {
-	status = "okay";
-};
-
-&dpu2 {
+/* Apalis PWM3, MXM3 pin 6 */
+&pwm0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm0>;
 	status = "okay";
 };
 
-/* Apalis PCIE1 */
-&pciea{
+/* Apalis PWM4, MXM3 pin 8 */
+&pwm1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpio7>;
-	clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>,
-		 <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>,
-		 <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>,
-		 <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>,
-		 <&pcie_sata_refclk_gate>;
-	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
-	ext_osc = <1>;
-	max-link-speed = <1>;
-	reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
+	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
-/* On-module Wi-Fi */
-&pcieb{
+/* Apalis PWM1, MXM3 pin 2 */
+&pwm2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pcieb &pinctrl_wifi>;
-	clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>,
-		 <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>,
-		 <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>,
-		 <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>,
-		 <&pcie_sata_refclk_gate>;
-	/*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/
-	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
-	/*epdev_on-supply = <&epdev_on>;*/
-	ext_osc = <1>;
-	max-link-speed = <1>;
-	reset-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
+	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";
 };
 
-&pd_cm40_intmux {
-	early_power_on;
-};
-
-&intmux_cm40 {
+/* Apalis PWM2, MXM3 pin 4 */
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";
 };
 
@@ -1533,14 +1466,6 @@
 	status = "okay";
 };
 
-&pd_cm41_intmux {
-	early_power_on;
-};
-
-&intmux_cm41 {
-	status = "okay";
-};
-
 &rpmsg1{
 	/*
 	 * 64K for one rpmsg instance:
@@ -1550,6 +1475,49 @@
 	status = "okay";
 };
 
+&sai1 {
+	assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+			  <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+			  <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
+			  <&clk IMX8QM_AUD_SAI_1_MCLK>;
+	assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
+	#sound-dai-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai1>;
+	status = "okay";
+};
+
+&sai6 {
+	assigned-clocks = <&clk IMX8QM_ACM_SAI6_MCLK_SEL>,
+			<&clk IMX8QM_AUD_PLL1_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK1_DIV>,
+			<&clk IMX8QM_AUD_SAI_6_MCLK>;
+	assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>;
+	assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
+	fsl,sai-asynchronous;
+	fsl,txm-rxs;
+	status = "okay";
+};
+
+&sai7 {
+	assigned-clocks = <&clk IMX8QM_ACM_SAI7_MCLK_SEL>,
+			<&clk IMX8QM_AUD_PLL1_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK1_DIV>,
+			<&clk IMX8QM_AUD_SAI_7_MCLK>;
+	assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>;
+	assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
+	fsl,sai-asynchronous;
+	fsl,txm-rxs;
+	status = "okay";
+};
+
+&sai_hdmi_rx {
+	fsl,sai-asynchronous;
+	status = "disabled";
+};
+
 &sai_hdmi_tx {
 	assigned-clocks =<&clk IMX8QM_ACM_HDMI_TX_SAI0_MCLK_SEL>,
 			 <&clk IMX8QM_AUD_PLL0_DIV>,
@@ -1578,44 +1546,6 @@
 	status = "okay";
 };
 
-/* Apalis LVDS1 */
-//TBD: enabling breaks HDMI
-#if 0
-&ldb2_phy {
-	status = "okay";
-};
-
-&ldb2 {
-	fsl,dual-channel;
-	status = "okay";
-
-	lvds-channel@0 {
-		fsl,data-mapping = "spwg";
-		fsl,data-width = <18>;
-		primary;
-		status = "okay";
-
-		display-timings {
-			native-mode = <&timing_fullhd>;
-			timing_fullhd: 1920x1080 {
-				clock-frequency = <138500000>;
-				hactive = <1920>;
-				vactive = <1080>;
-				hback-porch = <80>;
-				hfront-porch = <48>;
-				vback-porch = <23>;
-				vfront-porch = <3>;
-				hsync-len = <32>;
-				vsync-len = <5>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-	};
-};
-#endif
-
 /* Apalis SPDIF1 */
 &spdif0 {
 	pinctrl-names = "default";
@@ -1635,10 +1565,6 @@
 	status = "okay";
 };
 
-&tsens {
-	tsens-num = <6>;
-};
-
 &thermal_zones {
 	pmic-thermal0 {
 		polling-delay = <2000>;
@@ -1675,6 +1601,79 @@
 	};
 };
 
+&tsens {
+	tsens-num = <6>;
+};
+
+/* Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
+&usbh1 {
+	pinctrl-names = "idle", "active";
+	pinctrl-0 = <&pinctrl_usb_hsic_idle>;
+	pinctrl-1 = <&pinctrl_usb_hsic_active>;
+	adp-disable;
+	disable-over-current;
+	hnp-disable;
+	srp-disable;
+	vbus-supply = <&reg_usb_host_vbus>;
+	status = "okay";
+};
+
+/* Apalis USBO1 */
+&usbotg1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg1>;
+	adp-disable;
+	ci-disable-lpm;
+	hnp-disable;
+	power-polarity-active-high;
+	srp-disable;
+	status = "okay";
+};
+
+&usbphynop1 {
+	vbus-regulator = <&reg_usb_host_vbus>;
+};
+
+/* Apalis USBH4 SuperSpeed */
+&usbotg3 {
+	cdns3,usbphy = <&usbphynop1>;
+	dr_mode = "host";
+	status = "okay";
+};
+
+/* On-module eMMC */
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+/* Apalis MMC1 */
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_mmc1_cd>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_mmc1_cd>;
+	bus-width = <8>;
+	cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */
+	status = "okay";
+};
+
+/* Apalis SD1 */
+&usdhc3 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>;
+	bus-width = <4>;
+	cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */
+	status = "okay";
+};
+
 &vpu_decoder {
 	core_type = <2>;
 	status = "okay";