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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2013-08-12 10:56:34 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2013-08-12 10:56:34 +0200
commita207afeae668f9cd9fee570838f07b4cc9a8fc7e (patch)
tree8980737a774fa67c360ce9305f921f7782d1e82c
parent4c37205178482335cd6a68caea2ba46c02522ea2 (diff)
apalis/colibri_t30: hack to force speedo id of 2 for now
In preparation for the new Apalis resp. Colibri T30 production lots with either T30IQS-P-A3 or T30MQS-P-A3 chips that due to some bug were locked at 312 MHz force a speedo ID of 2 for now which allows regular operation of up to 1.4 GHz (single core only).
-rw-r--r--arch/arm/mach-tegra/tegra3_speedo.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c
index 2889f656f47a..92ea5fe30cde 100644
--- a/arch/arm/mach-tegra/tegra3_speedo.c
+++ b/arch/arm/mach-tegra/tegra3_speedo.c
@@ -305,8 +305,15 @@ static void rev_sku_to_speedo_ids(int rev, int sku)
case 0xb0: /* T30IQS-Ax */
case 0xb1: /* T30MQS-Ax */
case 0x90: /* T30AQS-Ax */
+#if defined(CONFIG_MACH_APALIS_T30) || defined(CONFIG_MACH_COLIBRI_T30)
+ /* Hack: Force speedo ID of 2 for now. */
+ cpu_speedo_id = 2;
+ soc_speedo_id = 2;
+ threshold_index = 2;
+#else /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
soc_speedo_id = 3;
threshold_index = 12;
+#endif /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
break;
case 0x93: /* T30AG-Ax */
cpu_speedo_id = 11;