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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-06-17 14:51:07 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-06-30 18:10:56 +0200
commit78238dfbbd14da6c4c4ae3185bad18564250c259 (patch)
tree8a56af4a6d49f1cfd906bdab98a04f543b8c5e5d
parent54fc54252960fe0377a3b38d6a5c5fd8b76f82ae (diff)
apalis_t30: pinmux: enable internal pull-up on mxm3 pin 37
While MXM3 pin 37 aka WAKE1_MICO is pulled up with 4.7 K on the Apalis Evaluation board and 100 K on the Ixora carrier board a custom carrier board may leave it floating which may cause an unintended high interrupt load on the default wake-up key with which may cause a lower CPU performance. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
-rw-r--r--arch/arm/mach-tegra/board-apalis_t30-pinmux.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
index f3c5b61aa60a..6bcdbd112586 100644
--- a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
@@ -240,7 +240,7 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
DEFAULT_PINMUX(GPIO_PU6, PWM3, NORMAL, NORMAL, OUTPUT),
DEFAULT_PINMUX(GPIO_PV0, RSVD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GPIO_PV1, RSVD, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(GPIO_PV1, RSVD, PULL_UP, NORMAL, INPUT),
DEFAULT_PINMUX(GPIO_PV2, RSVD1, NORMAL, NORMAL, INPUT),
#ifdef IXORA
DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, OUTPUT), /* UART2_3_RS232_FOFF_N */