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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-09-14 08:26:23 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-10-03 14:56:27 +0200 |
| commit | 840fe9aa86e1207a85bf0529161d2f5d1a4d0797 (patch) | |
| tree | a1c5bdaf57c9f161d7981ead838a49604f4fd3b6 | |
| parent | a33c89148ee32833cb930ea4779e6863c9bbc71d (diff) | |
tegra: colibri_t30: hack to avoid clock warnings
Hack to avoid extensive warnings being logged during boot-up due to CPU clock adjustments before regulator being ready.
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 110c8d4e601c..eba959c9e2d3 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -843,12 +843,15 @@ static int tegra3_cpu_clk_set_rate(struct clk *c, unsigned long rate) if (c->dvfs) { if (!c->dvfs->dvfs_rail) return -ENOSYS; +#ifndef CONFIG_MACH_COLIBRI_T30 +/* Hack: avoid extensive warnings being logged during boot-up. */ else if ((!c->dvfs->dvfs_rail->reg) && (clk_get_rate_locked(c) < rate)) { WARN(1, "Increasing CPU rate while regulator is not" " ready may overclock CPU\n"); return -ENOSYS; } +#endif /* CONFIG_MACH_COLIBRI_T30 */ } /* |