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authorHuang Shijie <b32955@freescale.com>2012-09-07 14:37:47 +0800
committerJason Liu <r64343@freescale.com>2012-09-13 16:25:12 +0800
commite99dbb43193c818271b456741e5e3a65c93cd9a3 (patch)
tree50519a23bac03da561bda1344314bb3388d1c0f0
parent3220313f2cfc41ce3d0796aa755c4544a81a16fd (diff)
ENGR00223349-3 gpmi: add a new field for HW_GPMI_CTRL1
add the WRN_DLY_SEL field for HW_GPMI_CTRL1. This field is used as delay for gpmi write strobe. Signed-off-by: Huang Shijie <b32955@freescale.com>
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-lib.c4
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-nand.h2
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index a65b6791415f..c13ae42a137d 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -992,6 +992,7 @@ return_results:
hw->use_half_periods = dll_use_half_periods;
hw->sample_delay_factor = sample_delay_factor;
hw->device_busy_timeout = 0x500; /* default busy timeout value. */
+ hw->wrn_dly_sel = 0;
/* Return success. */
return 0;
@@ -1037,6 +1038,9 @@ void gpmi_begin(struct gpmi_nand_data *this)
gpmi_regs + HW_GPMI_TIMING1);
/* [3] The following code is to set the HW_GPMI_CTRL1. */
+ writel(BM_GPMI_CTRL1_WRN_DLY_SEL, gpmi_regs + HW_GPMI_CTRL1_CLR);
+ writel(BF_GPMI_CTRL1_WRN_DLY_SEL(hw.wrn_dly_sel),
+ gpmi_regs + HW_GPMI_CTRL1_SET);
/* DLL_ENABLE must be set to 0 when setting RDN_DELAY or HALF_PERIOD. */
writel(BM_GPMI_CTRL1_DLL_ENABLE, gpmi_regs + HW_GPMI_CTRL1_CLR);
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index cf50a6055511..19b049f64d60 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -194,6 +194,7 @@ struct gpmi_nand_data {
* @use_half_periods: Indicates the clock is running slowly, so the
* NFC DLL should use half-periods.
* @sample_delay_factor: The sample delay factor.
+ * @wrn_dly_sel: The delay on the GPMI write strobe.
*/
struct gpmi_nfc_hardware_timing {
/* for GPMI_HW_GPMI_TIMING0 */
@@ -207,6 +208,7 @@ struct gpmi_nfc_hardware_timing {
/* for GPMI_HW_GPMI_CTRL1 */
bool use_half_periods;
uint8_t sample_delay_factor;
+ uint8_t wrn_dly_sel;
};
/**