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authorNitin Garg <nitin.garg@freescale.com>2012-01-09 17:31:49 -0600
committerNitin Garg <nitin.garg@freescale.com>2012-01-09 17:31:49 -0600
commite7b335baa555330f2fd4448f52611d19cc56bce7 (patch)
treec52419b5708fb006ce77135e4d7bf04ad77ccb64
parent8d8601e2bd5554bd8d68d80bad803b4147805071 (diff)
ENGR00171209: Initial Linux-2.6.38 port for imx53 smd
With this port USB, Ethernet, UART, I2C, Audio, Graphics, GPIO, keyboard, Wifi works on mx53 SMD. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
-rw-r--r--drivers/hwmon/Kconfig10
-rw-r--r--drivers/hwmon/Makefile1
-rw-r--r--drivers/hwmon/mag3110.c550
-rw-r--r--drivers/input/keyboard/mpr121.c4
-rw-r--r--drivers/mxc/amd-gpu/common/gsl_g12.c1
-rw-r--r--drivers/mxc/amd-gpu/common/gsl_memmgr.c97
-rw-r--r--drivers/mxc/amd-gpu/common/gsl_mmu.c18
-rw-r--r--drivers/mxc/amd-gpu/common/gsl_ringbuffer.c2
-rw-r--r--drivers/mxc/amd-gpu/common/pm4_microcode.inl358
-rw-r--r--drivers/mxc/amd-gpu/include/gsl_buildconfig.h4
-rw-r--r--drivers/mxc/amd-gpu/include/gsl_halconfig.h4
-rw-r--r--drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c10
-rw-r--r--drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h24
-rw-r--r--drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c45
-rw-r--r--drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c2
-rw-r--r--drivers/mxc/amd-gpu/platform/hal/linux/misc.c16
-rw-r--r--drivers/mxc/ipu3/ipu_common.c49
-rw-r--r--drivers/net/fec.c4
-rw-r--r--drivers/regulator/core.c6
19 files changed, 908 insertions, 297 deletions
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 15d23fccafe9..8bac0ddb8ad4 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1263,6 +1263,16 @@ config SENSORS_LIS3LV02D
endif # ACPI
+config SENSORS_MAG3110
+ tristate "Freescale MAG3110 e-compass sensor"
+ depends on I2C && SYSFS
+ help
+ If you say yes here you get support for the Freescale MAG3110
+ e-compass sensor.
+
+ This driver can also be built as a module. If so, the module
+ will be called mag3110.
+
config MXC_MMA8450
tristate "MMA8450 device driver"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 24b55ad69084..36ee41aeedb7 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -116,6 +116,7 @@ obj-$(CONFIG_MXC_MMA8450) += mxc_mma8450.o
obj-$(CONFIG_MXC_MMA8451) += mxc_mma8451.o
obj-$(CONFIG_SENSORS_DA9052) += da9052-adc.o
obj-$(CONFIG_SENSORS_IMX_AHCI) += imx_ahci_hwmon.o
+obj-$(CONFIG_SENSORS_MAG3110) += mag3110.o
ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y)
EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/hwmon/mag3110.c b/drivers/hwmon/mag3110.c
new file mode 100644
index 000000000000..7100474a9e19
--- /dev/null
+++ b/drivers/hwmon/mag3110.c
@@ -0,0 +1,550 @@
+/*
+ *
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/input-polldev.h>
+#include <linux/hwmon.h>
+#include <linux/input.h>
+#include <linux/wait.h>
+#include <linux/workqueue.h>
+#include <linux/earlysuspend.h>
+
+#define MAG3110_DRV_NAME "mag3110"
+#define MAG3110_ID 0xC4
+#define MAG3110_XYZ_DATA_LEN 6
+
+#define MAG3110_AC_MASK (0x01)
+#define MAG3110_AC_OFFSET 0
+#define MAG3110_DR_MODE_MASK (0x7 << 5)
+#define MAG3110_DR_MODE_OFFSET 5
+
+#define POLL_INTERVAL_MAX 500
+#define POLL_INTERVAL 100
+#define INT_TIMEOUT 1000
+
+/* register enum for mag3110 registers */
+enum {
+ MAG3110_DR_STATUS = 0x00,
+ MAG3110_OUT_X_MSB,
+ MAG3110_OUT_X_LSB,
+ MAG3110_OUT_Y_MSB,
+ MAG3110_OUT_Y_LSB,
+ MAG3110_OUT_Z_MSB,
+ MAG3110_OUT_Z_LSB,
+ MAG3110_WHO_AM_I,
+
+ MAG3110_OFF_X_MSB,
+ MAG3110_OFF_X_LSB,
+ MAG3110_OFF_Y_MSB,
+ MAG3110_OFF_Y_LSB,
+ MAG3110_OFF_Z_MSB,
+ MAG3110_OFF_Z_LSB,
+
+ MAG3110_DIE_TEMP,
+
+ MAG3110_CTRL_REG1 = 0x10,
+ MAG3110_CTRL_REG2,
+};
+
+struct mag3110_data {
+ struct i2c_client *client;
+ struct input_polled_dev *poll_dev;
+ struct device *hwmon_dev;
+ wait_queue_head_t waitq;
+ bool data_ready;
+ bool stop_polling;
+ u8 ctl_reg1;
+};
+
+static struct mag3110_data *mag3110_pdata;
+
+/*!
+ * This function do one mag3110 register read.
+ */
+static int mag3110_read_reg(struct i2c_client *client, u8 reg)
+{
+ return i2c_smbus_read_byte_data(client, reg);
+}
+
+/*!
+ * This function do one mag3110 register write.
+ */
+static int mag3110_write_reg(struct i2c_client *client, u8 reg, char value)
+{
+ int ret;
+
+ ret = i2c_smbus_write_byte_data(client, reg, value);
+ if (ret < 0)
+ dev_err(&client->dev, "i2c write failed\n");
+ return ret;
+}
+
+/*!
+ * This function do multiple mag3110 registers read.
+ */
+static int mag3110_read_block_data(struct i2c_client *client, u8 reg,
+ int count, u8 *addr)
+{
+ if (i2c_smbus_read_i2c_block_data
+ (client, reg, count, addr) < count) {
+ dev_err(&client->dev, "i2c block read failed\n");
+ return -1;
+ }
+
+ return count;
+}
+
+/*
+ * Initialization function
+ */
+static int mag3110_init_client(struct i2c_client *client)
+{
+ int val, ret;
+
+ /* enable automatic resets */
+ val = 0x80;
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG2, val);
+
+ /* set default data rate to 10HZ */
+ val = mag3110_read_reg(client, MAG3110_CTRL_REG1);
+ val |= (0x3 << MAG3110_DR_MODE_OFFSET);
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG1, val);
+
+ return ret;
+}
+
+/***************************************************************
+*
+* read sensor data from mag3110
+*
+***************************************************************/
+static int mag3110_read_data(short *x, short *y, short *z)
+{
+ struct mag3110_data *data;
+ u8 tmp_data[MAG3110_XYZ_DATA_LEN];
+
+ if (!mag3110_pdata)
+ return -EINVAL;
+
+ data = mag3110_pdata;
+ if (!wait_event_interruptible_timeout
+ (data->waitq, data->data_ready != 0,
+ msecs_to_jiffies(INT_TIMEOUT))) {
+ dev_dbg(&data->client->dev, "interrupt not received\n");
+ return -ETIME;
+ }
+
+ /* Clear data_ready flag after data is read out */
+ data->data_ready = 0;
+
+ if (mag3110_read_block_data(data->client,
+ MAG3110_OUT_X_MSB, MAG3110_XYZ_DATA_LEN, tmp_data) < 0)
+ return -1;
+
+ *x = ((tmp_data[0] << 8) & 0xff00) | tmp_data[1];
+ *y = ((tmp_data[2] << 8) & 0xff00) | tmp_data[3];
+ *z = ((tmp_data[4] << 8) & 0xff00) | tmp_data[5];
+
+ return 0;
+}
+
+static void report_abs(void)
+{
+ struct input_dev *idev;
+ short x, y, z;
+
+ if (mag3110_read_data(&x, &y, &z) != 0)
+ return;
+
+ idev = mag3110_pdata->poll_dev->input;
+ input_report_abs(idev, ABS_X, x);
+ input_report_abs(idev, ABS_Y, y);
+ input_report_abs(idev, ABS_Z, z);
+ input_sync(idev);
+}
+
+static void mag3110_dev_poll(struct input_polled_dev *dev)
+{
+ if (!mag3110_pdata->stop_polling)
+ report_abs();
+}
+
+static irqreturn_t mag3110_irq_handler(int irq, void *dev_id)
+{
+ mag3110_pdata->data_ready = 1;
+ wake_up_interruptible(&mag3110_pdata->waitq);
+
+ return IRQ_HANDLED;
+}
+
+static ssize_t mag3110_enable_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ int val;
+
+ val = mag3110_read_reg(client, MAG3110_CTRL_REG1) & MAG3110_AC_MASK;
+
+ return sprintf(buf, "%d\n", val);
+}
+
+static ssize_t mag3110_enable_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client;
+ int reg, ret, enable;
+ unsigned long val;
+ u8 tmp_data[MAG3110_XYZ_DATA_LEN];
+
+ if (strict_strtoul(buf, 10, &val) < 0)
+ return -EINVAL;
+
+ enable = (val == 1) ? 1 : 0;
+
+ client = to_i2c_client(dev);
+ reg = mag3110_read_reg(client, MAG3110_CTRL_REG1);
+ if (enable)
+ reg |= MAG3110_AC_MASK;
+ else
+ reg &= ~MAG3110_AC_MASK;
+
+ /* MAG3110_CTRL_REG1 bit 0, 0: STANDBY mode; 1: ACTIVE mode */
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG1, reg);
+ if (ret < 0)
+ return ret;
+
+ if (enable) {
+ msleep(100);
+ /* Read out MSB data to clear interrupt flag automatically */
+ mag3110_read_block_data(client, MAG3110_OUT_X_MSB,
+ MAG3110_XYZ_DATA_LEN, tmp_data);
+ }
+
+ return count;
+}
+
+static DEVICE_ATTR(enable, S_IWUSR | S_IRUGO,
+ mag3110_enable_show, mag3110_enable_store);
+
+static ssize_t mag3110_dr_mode_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ int val;
+
+ val = (mag3110_read_reg(client, MAG3110_CTRL_REG1)
+ & MAG3110_DR_MODE_MASK) >> MAG3110_DR_MODE_OFFSET;
+
+ return sprintf(buf, "%d\n", val);
+}
+
+static ssize_t mag3110_dr_mode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client;
+ int reg, ret;
+ unsigned long val;
+
+ /* This must be done when mag3110 is disabled */
+ if ((strict_strtoul(buf, 10, &val) < 0) || (val > 7))
+ return -EINVAL;
+
+ client = to_i2c_client(dev);
+
+ reg = mag3110_read_reg(client, MAG3110_CTRL_REG1) &
+ ~MAG3110_DR_MODE_MASK;
+ reg |= (val << MAG3110_DR_MODE_OFFSET);
+ /* MAG3110_CTRL_REG1 bit 5-7: data rate mode */
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG1, reg);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static DEVICE_ATTR(dr_mode, S_IWUSR | S_IRUGO,
+ mag3110_dr_mode_show, mag3110_dr_mode_store);
+
+static struct attribute *mag3110_attributes[] = {
+ &dev_attr_enable.attr,
+ &dev_attr_dr_mode.attr,
+ NULL
+};
+
+static const struct attribute_group mag3110_attr_group = {
+ .attrs = mag3110_attributes,
+};
+
+static int __devinit mag3110_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct i2c_adapter *adapter;
+ struct input_dev *idev;
+ struct mag3110_data *data;
+ int ret = 0;
+
+ adapter = to_i2c_adapter(client->dev.parent);
+ if (!i2c_check_functionality(adapter,
+ I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA |
+ I2C_FUNC_SMBUS_I2C_BLOCK))
+ return -EIO;
+
+ dev_info(&client->dev, "check mag3110 chip ID\n");
+ ret = mag3110_read_reg(client, MAG3110_WHO_AM_I);
+
+ if (MAG3110_ID != ret) {
+ dev_err(&client->dev,
+ "read chip ID 0x%x is not equal to 0x%x!\n", ret,
+ MAG3110_ID);
+ return -EINVAL;
+ }
+
+ data = kzalloc(sizeof(struct mag3110_data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+ data->client = client;
+ i2c_set_clientdata(client, data);
+
+ /*create device group in sysfs as user interface */
+ ret = sysfs_create_group(&client->dev.kobj, &mag3110_attr_group);
+ if (ret) {
+ dev_err(&client->dev, "create device file failed!\n");
+ ret = -EINVAL;
+ goto error_kfree;
+ }
+
+ /* Init queue */
+ init_waitqueue_head(&data->waitq);
+
+ data->hwmon_dev = hwmon_device_register(&client->dev);
+ data->stop_polling = false;
+ if (IS_ERR(data->hwmon_dev)) {
+ dev_err(&client->dev, "hwmon register failed!\n");
+ ret = PTR_ERR(data->hwmon_dev);
+ goto error_rm_dev_sysfs;
+ }
+
+ /*input poll device register */
+ data->poll_dev = input_allocate_polled_device();
+ if (!data->poll_dev) {
+ dev_err(&client->dev, "alloc poll device failed!\n");
+ ret = -ENOMEM;
+ goto error_rm_hwmon_dev;
+ }
+ data->poll_dev->poll = mag3110_dev_poll;
+ data->poll_dev->poll_interval = POLL_INTERVAL;
+ data->poll_dev->poll_interval_max = POLL_INTERVAL_MAX;
+ idev = data->poll_dev->input;
+ idev->name = MAG3110_DRV_NAME;
+ idev->id.bustype = BUS_I2C;
+ idev->evbit[0] = BIT_MASK(EV_ABS);
+
+ input_set_abs_params(idev, ABS_X, -15000, 15000, 0, 0);
+ input_set_abs_params(idev, ABS_Y, -15000, 15000, 0, 0);
+ input_set_abs_params(idev, ABS_Z, -15000, 15000, 0, 0);
+ ret = input_register_polled_device(data->poll_dev);
+ if (ret) {
+ dev_err(&client->dev, "register poll device failed!\n");
+ goto error_free_poll_dev;
+ }
+
+ /* set irq type to edge rising */
+ ret = request_irq(client->irq, mag3110_irq_handler,
+ IRQF_TRIGGER_RISING, client->dev.driver->name, idev);
+ if (ret < 0) {
+ dev_err(&client->dev, "failed to register irq %d!\n",
+ client->irq);
+ goto error_rm_poll_dev;
+ }
+
+ /* Initialize mag3110 chip */
+ mag3110_init_client(client);
+ mag3110_pdata = data;
+ dev_info(&client->dev, "mag3110 is probed\n");
+ return 0;
+
+error_rm_poll_dev:
+ input_unregister_polled_device(data->poll_dev);
+error_free_poll_dev:
+ input_free_polled_device(data->poll_dev);
+error_rm_hwmon_dev:
+ hwmon_device_unregister(data->hwmon_dev);
+error_rm_dev_sysfs:
+ sysfs_remove_group(&client->dev.kobj, &mag3110_attr_group);
+error_kfree:
+ kfree(data);
+ mag3110_pdata = NULL;
+
+ return ret;
+}
+
+static int mag3110_stop_chip(struct i2c_client *client)
+{
+ u8 tmp;
+ tmp = mag3110_read_reg(client, MAG3110_CTRL_REG1);
+ return mag3110_write_reg(client,
+ MAG3110_CTRL_REG1,
+ tmp & ~MAG3110_AC_MASK);
+}
+
+static void mag3110_shutdown(struct i2c_client *client)
+{
+ mag3110_pdata->stop_polling = true;
+ mag3110_stop_chip(client);
+}
+
+static int __devexit mag3110_remove(struct i2c_client *client)
+{
+ struct mag3110_data *data;
+ int ret;
+
+ data = i2c_get_clientdata(client);
+ ret = mag3110_stop_chip(client);
+ free_irq(client->irq, data);
+ input_unregister_polled_device(data->poll_dev);
+ input_free_polled_device(data->poll_dev);
+ hwmon_device_unregister(data->hwmon_dev);
+ sysfs_remove_group(&client->dev.kobj, &mag3110_attr_group);
+ kfree(data);
+ mag3110_pdata = NULL;
+
+ return ret;
+}
+
+#ifdef CONFIG_PM
+static int mag3110_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+ int ret;
+ struct mag3110_data *data = i2c_get_clientdata(client);
+
+ data->ctl_reg1 = mag3110_read_reg(client, MAG3110_CTRL_REG1);
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG1,
+ data->ctl_reg1 & ~MAG3110_AC_MASK);
+ return ret;
+}
+
+static int mag3110_resume(struct i2c_client *client)
+{
+ int ret;
+ u8 tmp_data[MAG3110_XYZ_DATA_LEN];
+ struct mag3110_data *data = i2c_get_clientdata(client);
+
+ ret = mag3110_write_reg(client, MAG3110_CTRL_REG1,
+ data->ctl_reg1);
+
+ if (data->ctl_reg1 & MAG3110_AC_MASK) {
+ /* Read out MSB data to clear interrupt flag automatically */
+ mag3110_read_block_data(client, MAG3110_OUT_X_MSB,
+ MAG3110_XYZ_DATA_LEN, tmp_data);
+ }
+
+ return ret;
+}
+
+#else
+#define mag3110_suspend NULL
+#define mag3110_resume NULL
+#endif /* CONFIG_PM */
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void mag3110_early_suspend(struct early_suspend *h)
+{
+ struct i2c_client *client;
+ pm_message_t state = { .event = PM_EVENT_SUSPEND };
+
+ if (!mag3110_pdata)
+ return -EINVAL;
+
+ client = mag3110_pdata->client;
+ mag3110_suspend(client, state);
+ dev_info(&client->dev, "mag3110 early_syspend\n");
+}
+
+static void mag3110_later_resume(struct early_suspend *h)
+{
+ struct i2c_client *client;
+
+ if (!mag3110_pdata)
+ return -EINVAL;
+
+ client = mag3110_pdata->client;
+ mag3110_resume(client);
+ dev_info(&client->dev, "mag3110 late_resume\n");
+}
+
+struct early_suspend mag3110_earlysuspend = {
+ .level = EARLY_SUSPEND_LEVEL_DISABLE_FB,
+ .suspend = mag3110_early_suspend,
+ .resume = mag3110_later_resume,
+};
+#endif
+
+static const struct i2c_device_id mag3110_id[] = {
+ {MAG3110_DRV_NAME, 0},
+ {}
+};
+
+MODULE_DEVICE_TABLE(i2c, mag3110_id);
+static struct i2c_driver mag3110_driver = {
+ .driver = {.name = MAG3110_DRV_NAME,
+ .owner = THIS_MODULE,},
+#ifndef CONFIG_HAS_EARLYSUSPEND
+ .suspend = mag3110_suspend,
+ .resume = mag3110_resume,
+#endif
+ .probe = mag3110_probe,
+ .remove = __devexit_p(mag3110_remove),
+ .shutdown = mag3110_shutdown,
+ .id_table = mag3110_id,
+};
+
+static int __init mag3110_init(void)
+{
+ int ret;
+ ret = i2c_add_driver(&mag3110_driver);
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ if (!ret)
+ register_early_suspend(&mag3110_earlysuspend);
+#endif
+ return ret;
+}
+
+static void __exit mag3110_exit(void)
+{
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ unregister_early_suspend(&mag3110_earlysuspend);
+#endif
+ i2c_del_driver(&mag3110_driver);
+}
+
+module_init(mag3110_init);
+module_exit(mag3110_exit);
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("Freescale mag3110 3-axis magnetometer driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/keyboard/mpr121.c b/drivers/input/keyboard/mpr121.c
index 7aae302758c5..3e92eaf7735e 100644
--- a/drivers/input/keyboard/mpr121.c
+++ b/drivers/input/keyboard/mpr121.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -207,7 +207,7 @@ static int __devinit mpr_touchkey_probe(struct i2c_client *client,
data->keycodes[i] = pdata->matrix[i];
}
- input_set_capability(input_dev, EV_MSC, MSC_SCAN);
+ input_set_capability(input_dev, EV_KEY, MSC_SCAN);
input_set_drvdata(input_dev, data);
error = request_threaded_irq(client->irq, NULL,
diff --git a/drivers/mxc/amd-gpu/common/gsl_g12.c b/drivers/mxc/amd-gpu/common/gsl_g12.c
index 8286e8e6a6ac..f3d02b6eeb31 100644
--- a/drivers/mxc/amd-gpu/common/gsl_g12.c
+++ b/drivers/mxc/amd-gpu/common/gsl_g12.c
@@ -220,7 +220,6 @@ kgsl_g12_setpagetable(gsl_device_t *device, unsigned int reg_ptbase, gpuaddr_t p
#else
(void)device;
(void)reg_ptbase;
- (void)reg_varange;
#endif
return (GSL_SUCCESS);
}
diff --git a/drivers/mxc/amd-gpu/common/gsl_memmgr.c b/drivers/mxc/amd-gpu/common/gsl_memmgr.c
index 75f250ae59b1..3248f6d46554 100644
--- a/drivers/mxc/amd-gpu/common/gsl_memmgr.c
+++ b/drivers/mxc/amd-gpu/common/gsl_memmgr.c
@@ -479,6 +479,8 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m
unsigned int blksize;
unsigned int baseaddr, alignedbaseaddr, alignfragment;
int freeblk, alignmentshift;
+ memblk_t *ptrbest = NULL;
+ unsigned int fitsize = ~0UL;
kgsl_log_write( KGSL_LOG_GROUP_MEMORY | KGSL_LOG_LEVEL_TRACE,
"--> int kgsl_memarena_alloc(gsl_memarena_t *memarena=0x%08x, gsl_flags_t flags=0x%08x, int size=%d, gsl_memdesc_t *memdesc=%M)\n", memarena, flags, size, memdesc );
@@ -542,17 +544,33 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m
do
{
+ int aba;
// align base address
- baseaddr = ptrfree->blkaddr + memarena->gpubaseaddr;
- alignedbaseaddr = gsl_memarena_alignaddr(baseaddr, alignmentshift);
+ baseaddr = ptrfree->blkaddr + memarena->gpubaseaddr;
+ aba = gsl_memarena_alignaddr(baseaddr, alignmentshift);
- alignfragment = alignedbaseaddr - baseaddr;
-
- if (ptrfree->blksize >= blksize + alignfragment)
- {
- result = GSL_SUCCESS;
- freeblk = 1;
-
+ if (aba - baseaddr == 0 && ptrfree->blksize == blksize) {
+ ptrbest = ptrfree;
+ alignfragment = aba - baseaddr;
+ alignedbaseaddr = aba;
+ result = GSL_SUCCESS;
+ break;
+ }
+
+ if ((ptrfree->blksize >= blksize + aba - baseaddr) &&
+ (fitsize > ptrfree->blksize)) {
+ fitsize = ptrfree->blksize;
+ alignfragment = aba - baseaddr;
+ alignedbaseaddr = aba;
+ result = GSL_SUCCESS;
+ ptrbest = ptrfree;
+ }
+
+ ptrfree = ptrfree->next;
+
+ } while (ptrfree != memarena->freelist.allocrover);
+
+ if (ptrbest) {
memdesc->gpuaddr = alignedbaseaddr;
memdesc->hostptr = kgsl_memarena_gethostptr(memarena, memdesc->gpuaddr);
memdesc->size = blksize;
@@ -561,50 +579,41 @@ kgsl_memarena_alloc(gsl_memarena_t *memarena, gsl_flags_t flags, int size, gsl_m
{
// insert new node to handle newly created (small) fragment
p = kgsl_memarena_getmemblknode(memarena);
- p->blkaddr = ptrfree->blkaddr;
+ p->blkaddr = ptrbest->blkaddr;
p->blksize = alignfragment;
- p->next = ptrfree;
- p->prev = ptrfree->prev;
- ptrfree->prev->next = p;
- ptrfree->prev = p;
+ p->next = ptrbest;
+ p->prev = ptrbest->prev;
+ ptrbest->prev->next = p;
+ ptrbest->prev = p;
- if (ptrfree == memarena->freelist.head)
- {
- memarena->freelist.head = p;
- }
+ if (ptrbest == memarena->freelist.head)
+ memarena->freelist.head = p;
}
- ptrfree->blkaddr += alignfragment + blksize;
- ptrfree->blksize -= alignfragment + blksize;
+ ptrbest->blkaddr += alignfragment + blksize;
+ ptrbest->blksize -= alignfragment + blksize;
- memarena->freelist.allocrover = ptrfree;
+ memarena->freelist.allocrover = ptrbest;
- if (ptrfree->blksize == 0 && ptrfree != ptrlast)
- {
- ptrfree->prev->next = ptrfree->next;
- ptrfree->next->prev = ptrfree->prev;
- if (ptrfree == memarena->freelist.head)
- {
- memarena->freelist.head = ptrfree->next;
- }
- if (ptrfree == memarena->freelist.allocrover)
- {
- memarena->freelist.allocrover = ptrfree->next;
- }
- if (ptrfree == memarena->freelist.freerover)
- {
- memarena->freelist.freerover = ptrfree->prev;
- }
- p = ptrfree;
- ptrfree = ptrfree->prev;
- kgsl_memarena_releasememblknode(memarena, p);
- }
- }
+ if (ptrbest->blksize == 0 && ptrbest != ptrlast) {
+ ptrbest->prev->next = ptrbest->next;
+ ptrbest->next->prev = ptrbest->prev;
- ptrfree = ptrfree->next;
+ if (ptrbest == memarena->freelist.head)
+ memarena->freelist.head = ptrbest->next;
+
+ if (ptrbest == memarena->freelist.allocrover)
+ memarena->freelist.allocrover = ptrbest->next;
+
+ if (ptrbest == memarena->freelist.freerover)
+ memarena->freelist.freerover = ptrbest->prev;
- } while (!freeblk && ptrfree != memarena->freelist.allocrover);
+ p = ptrbest;
+ ptrbest = ptrbest->prev;
+ kgsl_memarena_releasememblknode(memarena, p);
+ }
+ }
GSL_MEMARENA_UNLOCK();
diff --git a/drivers/mxc/amd-gpu/common/gsl_mmu.c b/drivers/mxc/amd-gpu/common/gsl_mmu.c
index 810a058a515d..8b71b258e1c2 100644
--- a/drivers/mxc/amd-gpu/common/gsl_mmu.c
+++ b/drivers/mxc/amd-gpu/common/gsl_mmu.c
@@ -89,7 +89,8 @@ const unsigned int GSL_PT_PAGE_AP[4] = {(GSL_PT_PAGE_READ | GSL_PT_PAGE_WRITE),
#define GSL_PT_MAP_SETBITS(pte, bits) (GSL_PT_MAP_GET(pte) |= (((unsigned int) bits) & GSL_PT_PAGE_AP_MASK))
#define GSL_PT_MAP_SETADDR(pte, pageaddr) (GSL_PT_MAP_GET(pte) = (GSL_PT_MAP_GET(pte) & ~GSL_PT_PAGE_ADDR_MASK) | (((unsigned int) pageaddr) & GSL_PT_PAGE_ADDR_MASK))
-#define GSL_PT_MAP_RESET(pte) (GSL_PT_MAP_GET(pte) = 0)
+/* reserve RV and WV bits to work around READ_PROTECTION_ERROR in some cases */
+#define GSL_PT_MAP_RESET(pte) (GSL_PT_MAP_GET(pte) &= ~GSL_PT_PAGE_ADDR_MASK)
#define GSL_PT_MAP_RESETBITS(pte, bits) (GSL_PT_MAP_GET(pte) &= ~(((unsigned int) bits) & GSL_PT_PAGE_AP_MASK))
#define GSL_MMU_VIRT_TO_PAGE(va) *((unsigned int *)(pagetable->base.gpuaddr + (GSL_PT_ENTRY_GET(va) * GSL_PT_ENTRY_SIZEBYTES)))
@@ -708,6 +709,16 @@ kgsl_mmu_map(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, const gsl_scatterlist_t *sca
//----------------------------------------------------------------------------
+static bool is_superpte_empty(gsl_pagetable_t *pagetable, unsigned int superpte)
+{
+ int i;
+ for (i = 0; i < GSL_PT_SUPER_PTE; i++) {
+ if (GSL_PT_MAP_GET(superpte+i))
+ return false;
+ }
+ return true;
+}
+
int
kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pid)
{
@@ -777,7 +788,10 @@ kgsl_mmu_unmap(gsl_mmu_t *mmu, gpuaddr_t gpubaseaddr, int range, unsigned int pi
{
do
{
- pagetable->last_superpte -= GSL_PT_SUPER_PTE;
+ if (is_superpte_empty(pagetable, superpte))
+ pagetable->last_superpte -= GSL_PT_SUPER_PTE;
+ else
+ break;
} while (!GSL_PT_MAP_GETADDR(pagetable->last_superpte) && pagetable->last_superpte >= GSL_PT_SUPER_PTE);
}
diff --git a/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c b/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c
index fb05ff3cbe14..112fd086cf81 100644
--- a/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c
+++ b/drivers/mxc/amd-gpu/common/gsl_ringbuffer.c
@@ -342,8 +342,6 @@ kgsl_ringbuffer_checkpm4(unsigned int* cmds, unsigned int sizedwords, int pmodeo
static void
kgsl_ringbuffer_submit(gsl_ringbuffer_t *rb)
{
- unsigned int value;
-
kgsl_log_write( KGSL_LOG_GROUP_COMMAND | KGSL_LOG_LEVEL_TRACE,
"--> static void kgsl_ringbuffer_submit(gsl_ringbuffer_t *rb=0x%08x)\n", rb );
diff --git a/drivers/mxc/amd-gpu/common/pm4_microcode.inl b/drivers/mxc/amd-gpu/common/pm4_microcode.inl
index 03f6f4cd35e4..058548b41522 100644
--- a/drivers/mxc/amd-gpu/common/pm4_microcode.inl
+++ b/drivers/mxc/amd-gpu/common/pm4_microcode.inl
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2010, QUALCOMM Incorporated. All rights reserved.
+/* Copyright (c) 2008-2011, QUALCOMM Incorporated. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -26,12 +26,14 @@
*
*/
+// Microcode Source Version 20111020.a
+
#ifndef PM4_MICROCODE_H
#define PM4_MICROCODE_H
-#define PM4_MICROCODE_VERSION 300684
+#define PM4_MICROCODE_VERSION 422468
-#define PM4_MICROCODE_SIZE 768
+#define PM4_MICROCODE_SIZE 768 // Size of PM4 microcode in QWORD
#ifdef _PRIMLIB_INCLUDE
@@ -47,20 +49,20 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0xd9004800, 0x000 },
{ 0x00000000, 0x00400000, 0x000 },
{ 0x00000000, 0x34e00000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x0000ffff, 0xc0280a20, 0x000 },
{ 0x00000000, 0x00294582, 0x000 },
{ 0x00000000, 0xd9004800, 0x000 },
{ 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x0000ffff, 0xc0284620, 0x000 },
{ 0x00000000, 0xd9004800, 0x000 },
{ 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0x00600000, 0x2a8 },
+ { 0x00000000, 0x00600000, 0x2ac },
{ 0x00000000, 0xc0200c00, 0x000 },
{ 0x000021fc, 0x0029462c, 0x000 },
{ 0x00000000, 0x00404803, 0x021 },
- { 0x00000000, 0x00600000, 0x2a8 },
+ { 0x00000000, 0x00600000, 0x2ac },
{ 0x00000000, 0xc0200000, 0x000 },
{ 0x00000000, 0xc0200c00, 0x000 },
{ 0x000021fc, 0x0029462c, 0x000 },
@@ -78,7 +80,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x0000000e, 0x00404811, 0x000 },
{ 0x00000394, 0x00204411, 0x000 },
{ 0x00000001, 0xc0404811, 0x000 },
- { 0x00000000, 0x00600000, 0x2a8 },
+ { 0x00000000, 0x00600000, 0x2ac },
{ 0x000021f9, 0x0029462c, 0x000 },
{ 0x00000008, 0xc0210a20, 0x000 },
{ 0x00000000, 0x14e00000, 0x02d },
@@ -88,53 +90,48 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x0000001b, 0x002f0222, 0x000 },
{ 0x00000000, 0x0ce00000, 0x043 },
{ 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04a },
+ { 0x00000000, 0x0ce00000, 0x045 },
{ 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x051 },
+ { 0x00000000, 0x0ce00000, 0x047 },
{ 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x058 },
+ { 0x00000000, 0x0ce00000, 0x049 },
{ 0x00000014, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x058 },
+ { 0x00000000, 0x0ce00000, 0x049 },
{ 0x00000015, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x060 },
+ { 0x00000000, 0x0ce00000, 0x05b },
{ 0x000021f9, 0x0029462c, 0x000 },
{ 0x00000000, 0xc0404802, 0x000 },
{ 0x0000001f, 0x40280a20, 0x000 },
{ 0x0000001b, 0x002f0222, 0x000 },
{ 0x00000000, 0x0ce00000, 0x043 },
{ 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x04a },
- { 0x00000000, 0x00400000, 0x051 },
+ { 0x00000000, 0x0ce00000, 0x045 },
+ { 0x00000000, 0x00400000, 0x047 },
{ 0x0000001f, 0xc0210e20, 0x000 },
- { 0x00000612, 0x00204411, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x000021f9, 0x0029462c, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
+ { 0x00000612, 0x00404411, 0x04c },
{ 0x0000001e, 0xc0210e20, 0x000 },
- { 0x00000600, 0x00204411, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x000021f9, 0x0029462c, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
+ { 0x00000600, 0x00404411, 0x04c },
{ 0x0000001e, 0xc0210e20, 0x000 },
- { 0x00000605, 0x00204411, 0x000 },
- { 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x000021f9, 0x0029462c, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
+ { 0x00000605, 0x00404411, 0x04c },
{ 0x0000001f, 0x40280a20, 0x000 },
{ 0x0000001f, 0xc0210e20, 0x000 },
{ 0x0000060a, 0x00204411, 0x000 },
{ 0x00000000, 0x00204803, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
- { 0x00000000, 0xc0204800, 0x000 },
+ { 0x00000000, 0xc0201000, 0x000 },
+ { 0x00000000, 0x00204804, 0x000 },
+ { 0x00000000, 0xc0200c00, 0x000 },
+ { 0x00000000, 0x00204803, 0x000 },
+ { 0x00000080, 0x00201c11, 0x000 },
{ 0x000021f9, 0x0029462c, 0x000 },
- { 0x00000000, 0x00404802, 0x000 },
- { 0x0000001f, 0xc0680a20, 0x2a8 },
+ { 0x00000000, 0x00204802, 0x000 },
+ { 0x00000000, 0x00600000, 0x130 },
+ { 0x00000000, 0x002f0070, 0x000 },
+ { 0x00000000, 0x0ce00000, 0x000 },
+ { 0x00000001, 0x00331e27, 0x000 },
+ { 0x00000000, 0x002f0227, 0x000 },
+ { 0x00000000, 0x0ae00000, 0x054 },
+ { 0x00000000, 0x00400000, 0x051 },
+ { 0x0000001f, 0xc0680a20, 0x2ac },
{ 0x000021f9, 0x0029462c, 0x000 },
{ 0x00000000, 0x00404802, 0x000 },
{ 0x8100ffff, 0x00204411, 0x000 },
@@ -142,24 +139,24 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00001fff, 0x40280a20, 0x000 },
{ 0x80000000, 0x40280e20, 0x000 },
{ 0x40000000, 0xc0281220, 0x000 },
- { 0x00040000, 0x00694622, 0x2b2 },
+ { 0x00040000, 0x00694622, 0x2b4 },
{ 0x00000000, 0x00201410, 0x000 },
{ 0x00000000, 0x002f0223, 0x000 },
- { 0x00000000, 0x0ae00000, 0x06d },
- { 0x00000000, 0xc0401800, 0x070 },
+ { 0x00000000, 0x0ae00000, 0x068 },
+ { 0x00000000, 0xc0401800, 0x06b },
{ 0x00001fff, 0xc0281a20, 0x000 },
- { 0x00040000, 0x00694626, 0x2b2 },
+ { 0x00040000, 0x00694626, 0x2b4 },
{ 0x00000000, 0x00201810, 0x000 },
{ 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ae00000, 0x073 },
- { 0x00000000, 0xc0401c00, 0x076 },
+ { 0x00000000, 0x0ae00000, 0x06e },
+ { 0x00000000, 0xc0401c00, 0x071 },
{ 0x00001fff, 0xc0281e20, 0x000 },
- { 0x00040000, 0x00694627, 0x2b2 },
+ { 0x00040000, 0x00694627, 0x2b4 },
{ 0x00000000, 0x00201c10, 0x000 },
{ 0x00000000, 0x00204402, 0x000 },
{ 0x00000000, 0x002820c5, 0x000 },
{ 0x00000000, 0x004948e8, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x00000010, 0x40210a20, 0x000 },
{ 0x000000ff, 0x00280a22, 0x000 },
{ 0x000007ff, 0x40280e20, 0x000 },
@@ -167,25 +164,25 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000005, 0xc0211220, 0x000 },
{ 0x00080000, 0x00281224, 0x000 },
{ 0x00000013, 0x00210224, 0x000 },
- { 0x00000000, 0x14c00000, 0x084 },
+ { 0x00000000, 0x14c00000, 0x07f },
{ 0xa100ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00204811, 0x000 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x088 },
+ { 0x00000000, 0x0ae00000, 0x083 },
{ 0x00000000, 0x0020162d, 0x000 },
- { 0x00004000, 0x00500e23, 0x097 },
+ { 0x00004000, 0x00500e23, 0x092 },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x08c },
+ { 0x00000000, 0x0ae00000, 0x087 },
{ 0x00000001, 0x0020162d, 0x000 },
- { 0x00004800, 0x00500e23, 0x097 },
+ { 0x00004800, 0x00500e23, 0x092 },
{ 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x090 },
+ { 0x00000000, 0x0ae00000, 0x08b },
{ 0x00000003, 0x0020162d, 0x000 },
- { 0x00004900, 0x00500e23, 0x097 },
+ { 0x00004900, 0x00500e23, 0x092 },
{ 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x094 },
+ { 0x00000000, 0x0ae00000, 0x08f },
{ 0x00000002, 0x0020162d, 0x000 },
- { 0x00004908, 0x00500e23, 0x097 },
+ { 0x00004908, 0x00500e23, 0x092 },
{ 0x00000012, 0x0020162d, 0x000 },
{ 0x00002000, 0x00300e23, 0x000 },
{ 0x00000000, 0x00290d83, 0x000 },
@@ -200,7 +197,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x002948e5, 0x000 },
{ 0x9300ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00404806, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x00000000, 0xc0201400, 0x000 },
{ 0x0000001f, 0x00211a25, 0x000 },
@@ -209,31 +206,31 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000010, 0x00211225, 0x000 },
{ 0x8300ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0ae },
+ { 0x00000000, 0x0ae00000, 0x0a9 },
{ 0x00000000, 0x00203622, 0x000 },
- { 0x00004000, 0x00504a23, 0x0bd },
+ { 0x00004000, 0x00504a23, 0x0b8 },
{ 0x00000001, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b2 },
+ { 0x00000000, 0x0ae00000, 0x0ad },
{ 0x00000001, 0x00203622, 0x000 },
- { 0x00004800, 0x00504a23, 0x0bd },
+ { 0x00004800, 0x00504a23, 0x0b8 },
{ 0x00000002, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0b6 },
+ { 0x00000000, 0x0ae00000, 0x0b1 },
{ 0x00000003, 0x00203622, 0x000 },
- { 0x00004900, 0x00504a23, 0x0bd },
+ { 0x00004900, 0x00504a23, 0x0b8 },
{ 0x00000003, 0x002f0224, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0ba },
+ { 0x00000000, 0x0ae00000, 0x0b5 },
{ 0x00000002, 0x00203622, 0x000 },
- { 0x00004908, 0x00504a23, 0x0bd },
+ { 0x00004908, 0x00504a23, 0x0b8 },
{ 0x00000012, 0x00203622, 0x000 },
{ 0x00000000, 0x00290d83, 0x000 },
{ 0x00002000, 0x00304a23, 0x000 },
{ 0x8400ffff, 0x00204411, 0x000 },
{ 0x00000000, 0xc0204800, 0x000 },
{ 0x00000000, 0x21000000, 0x000 },
- { 0x00000000, 0x00400000, 0x0a4 },
+ { 0x00000000, 0x00400000, 0x09f },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
- { 0x00040578, 0x00604411, 0x2b2 },
+ { 0x00040578, 0x00604411, 0x2b4 },
{ 0x00000000, 0xc0400000, 0x000 },
{ 0x00000000, 0xc0200c00, 0x000 },
{ 0x00000000, 0xc0201000, 0x000 },
@@ -241,62 +238,62 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0xc0201800, 0x000 },
{ 0x00007f00, 0x00280a21, 0x000 },
{ 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0cd },
+ { 0x00000000, 0x0ce00000, 0x0c8 },
{ 0x00000000, 0xc0201c00, 0x000 },
{ 0x00000000, 0x17000000, 0x000 },
{ 0x00000010, 0x00280a23, 0x000 },
{ 0x00000010, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0d5 },
+ { 0x00000000, 0x0ce00000, 0x0d0 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x2b2 },
- { 0x00000000, 0x00400000, 0x0d6 },
- { 0x00000000, 0x00600000, 0x135 },
+ { 0x00040000, 0x00694624, 0x2b4 },
+ { 0x00000000, 0x00400000, 0x0d1 },
+ { 0x00000000, 0x00600000, 0x130 },
{ 0x00000000, 0x002820d0, 0x000 },
{ 0x00000007, 0x00280a23, 0x000 },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0dd },
+ { 0x00000000, 0x0ae00000, 0x0d8 },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x04e00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
+ { 0x00000000, 0x04e00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
{ 0x00000002, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0e2 },
+ { 0x00000000, 0x0ae00000, 0x0dd },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x02e00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
+ { 0x00000000, 0x02e00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
{ 0x00000003, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0e7 },
+ { 0x00000000, 0x0ae00000, 0x0e2 },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x0ce00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
+ { 0x00000000, 0x0ce00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
{ 0x00000004, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0ec },
+ { 0x00000000, 0x0ae00000, 0x0e7 },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
- { 0x00000005, 0x002f0222, 0x000 },
{ 0x00000000, 0x0ae00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
+ { 0x00000005, 0x002f0222, 0x000 },
+ { 0x00000000, 0x0ae00000, 0x0ec },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x06e00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
+ { 0x00000000, 0x06e00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
{ 0x00000006, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x0f6 },
+ { 0x00000000, 0x0ae00000, 0x0f1 },
{ 0x00000000, 0x002f00a8, 0x000 },
- { 0x00000000, 0x08e00000, 0x0f6 },
- { 0x00000000, 0x00400000, 0x0fd },
+ { 0x00000000, 0x08e00000, 0x0f1 },
+ { 0x00000000, 0x00400000, 0x0f8 },
{ 0x00007f00, 0x00280a21, 0x000 },
{ 0x00004500, 0x002f0222, 0x000 },
{ 0x00000000, 0x0ae00000, 0x000 },
{ 0x00000008, 0x00210a23, 0x000 },
- { 0x00000000, 0x14e00000, 0x11b },
+ { 0x00000000, 0x14e00000, 0x116 },
{ 0x00000000, 0xc0204400, 0x000 },
{ 0x00000000, 0xc0404800, 0x000 },
{ 0x00007f00, 0x00280a21, 0x000 },
{ 0x00004500, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x102 },
+ { 0x00000000, 0x0ae00000, 0x0fd },
{ 0x00000000, 0xc0200000, 0x000 },
{ 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x00404c07, 0x0cd },
+ { 0x00000000, 0x00404c07, 0x0c8 },
{ 0x00000000, 0xc0201000, 0x000 },
{ 0x00000000, 0xc0201400, 0x000 },
{ 0x00000000, 0xc0201800, 0x000 },
@@ -304,11 +301,11 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x17000000, 0x000 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x2b2 },
+ { 0x00040000, 0x00694624, 0x2b4 },
{ 0x00000000, 0x002820d0, 0x000 },
{ 0x00000000, 0x002f00a8, 0x000 },
{ 0x00000000, 0x0ce00000, 0x000 },
- { 0x00000000, 0x00404c07, 0x107 },
+ { 0x00000000, 0x00404c07, 0x102 },
{ 0x00000000, 0xc0201000, 0x000 },
{ 0x00000000, 0xc0201400, 0x000 },
{ 0x00000000, 0xc0201800, 0x000 },
@@ -316,11 +313,11 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x17000000, 0x000 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
- { 0x00040000, 0x00694624, 0x2b2 },
+ { 0x00040000, 0x00694624, 0x2b4 },
{ 0x00000000, 0x002820d0, 0x000 },
{ 0x00000000, 0x002f00a8, 0x000 },
{ 0x00000000, 0x06e00000, 0x000 },
- { 0x00000000, 0x00404c07, 0x113 },
+ { 0x00000000, 0x00404c07, 0x10e },
{ 0x0000060d, 0x00204411, 0x000 },
{ 0x00000000, 0xc0204800, 0x000 },
{ 0x0000860e, 0x00204411, 0x000 },
@@ -335,13 +332,13 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000001, 0x00204811, 0x000 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x00007fff, 0x00281a22, 0x000 },
- { 0x00040000, 0x00694626, 0x2b2 },
+ { 0x00040000, 0x00694626, 0x2b4 },
{ 0x00000000, 0x00200c10, 0x000 },
{ 0x00000000, 0xc0201000, 0x000 },
{ 0x80000000, 0x00281a22, 0x000 },
{ 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0ce00000, 0x132 },
- { 0x00000000, 0x00600000, 0x135 },
+ { 0x00000000, 0x0ce00000, 0x12d },
+ { 0x00000000, 0x00600000, 0x130 },
{ 0x00000000, 0x00201c10, 0x000 },
{ 0x00000000, 0x00300c67, 0x000 },
{ 0x0000060d, 0x00204411, 0x000 },
@@ -353,10 +350,10 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00204811, 0x000 },
{ 0x000001ea, 0x00204411, 0x000 },
{ 0x00000000, 0x00204804, 0x000 },
- { 0x00000000, 0x1ac00000, 0x13b },
+ { 0x00000000, 0x1ac00000, 0x136 },
{ 0x9e00ffff, 0x00204411, 0x000 },
{ 0xdeadbeef, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x13e },
+ { 0x00000000, 0x1ae00000, 0x139 },
{ 0xa400ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x0080480b, 0x000 },
{ 0x000001f3, 0x00204411, 0x000 },
@@ -405,28 +402,28 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000001, 0x00303e2f, 0x000 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x172 },
+ { 0x00000000, 0x0ce00000, 0x16d },
{ 0x00000000, 0xd9000000, 0x000 },
{ 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000002, 0x00204811, 0x000 },
{ 0x00000000, 0x002f0230, 0x000 },
- { 0x00000000, 0x0ae00000, 0x175 },
+ { 0x00000000, 0x0ae00000, 0x170 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x00000009, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x17d },
- { 0x00000000, 0x00600000, 0x2af },
+ { 0x00000000, 0x14c00000, 0x178 },
+ { 0x00000000, 0x00600000, 0x2aa },
{ 0x00000000, 0x00200c11, 0x000 },
{ 0x00000016, 0x00203623, 0x000 },
{ 0x00000000, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x180 },
+ { 0x00000000, 0x14c00000, 0x17b },
{ 0x00000000, 0xc0200000, 0x000 },
{ 0x00000001, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x183 },
+ { 0x00000000, 0x14c00000, 0x17e },
{ 0x00000000, 0xc0200000, 0x000 },
{ 0x00000002, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x18d },
+ { 0x00000000, 0x14c00000, 0x188 },
{ 0x00000004, 0xc0203620, 0x000 },
{ 0x00000005, 0xc0203620, 0x000 },
{ 0x00000006, 0xc0203620, 0x000 },
@@ -436,7 +433,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x0000000a, 0xc0203620, 0x000 },
{ 0x0000000b, 0xc0203620, 0x000 },
{ 0x00000003, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1b5 },
+ { 0x00000000, 0x14c00000, 0x1b0 },
{ 0x00000000, 0xc0200c00, 0x000 },
{ 0x8c00ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00204803, 0x000 },
@@ -476,24 +473,24 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000003, 0x00384a27, 0x000 },
{ 0x00300000, 0x00293a2e, 0x000 },
{ 0x00000004, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1bd },
+ { 0x00000000, 0x14c00000, 0x1b8 },
{ 0xa300ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x40204800, 0x000 },
{ 0x0000000a, 0xc0220e20, 0x000 },
{ 0x00000011, 0x00203623, 0x000 },
{ 0x000021f4, 0x00204411, 0x000 },
- { 0x0000000a, 0x00614a2c, 0x2af },
+ { 0x0000000a, 0x00614a2c, 0x2aa },
{ 0x00000005, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1c0 },
+ { 0x00000000, 0x14c00000, 0x1bb },
{ 0x00000000, 0xc0200000, 0x000 },
{ 0x00000006, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1c6 },
+ { 0x00000000, 0x14c00000, 0x1c1 },
{ 0x9c00ffff, 0x00204411, 0x000 },
{ 0x0000001f, 0x40214a20, 0x000 },
{ 0x9600ffff, 0x00204411, 0x000 },
{ 0x00000000, 0xc0204800, 0x000 },
{ 0x00000007, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1d0 },
+ { 0x00000000, 0x14c00000, 0x1cb },
{ 0x3fffffff, 0x00283a2e, 0x000 },
{ 0xc0000000, 0x40280e20, 0x000 },
{ 0x00000000, 0x0029386e, 0x000 },
@@ -503,7 +500,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0xc0202c00, 0x000 },
{ 0x00000000, 0x0020480b, 0x000 },
{ 0x00000008, 0x00210222, 0x000 },
- { 0x00000000, 0x14c00000, 0x1dc },
+ { 0x00000000, 0x14c00000, 0x1d7 },
{ 0x00000000, 0xc0200c00, 0x000 },
{ 0x00000013, 0x00203623, 0x000 },
{ 0x00000015, 0x00203623, 0x000 },
@@ -515,7 +512,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0xefffffff, 0x00283a2e, 0x000 },
{ 0x00000000, 0x0029386e, 0x000 },
{ 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0x00600000, 0x28c },
+ { 0x00000000, 0x00600000, 0x287 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x0000001f, 0x00210e22, 0x000 },
{ 0x00000000, 0x14e00000, 0x000 },
@@ -529,46 +526,46 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x8400ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00204803, 0x000 },
{ 0x00000000, 0x21000000, 0x000 },
- { 0x00000000, 0x00400000, 0x1de },
+ { 0x00000000, 0x00400000, 0x1d9 },
{ 0x8200ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
{ 0x00000000, 0xc0200800, 0x000 },
{ 0x00003fff, 0x40280e20, 0x000 },
{ 0x00000010, 0xc0211220, 0x000 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x1fb },
- { 0x00000000, 0x2ae00000, 0x205 },
+ { 0x00000000, 0x0ae00000, 0x1f6 },
+ { 0x00000000, 0x2ae00000, 0x200 },
{ 0x20000080, 0x00281e2e, 0x000 },
{ 0x00000080, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x1f8 },
- { 0x00000000, 0x00401c0c, 0x1f9 },
+ { 0x00000000, 0x0ce00000, 0x1f3 },
+ { 0x00000000, 0x00401c0c, 0x1f4 },
{ 0x00000010, 0x00201e2d, 0x000 },
{ 0x000021f9, 0x00294627, 0x000 },
- { 0x00000000, 0x00404811, 0x205 },
+ { 0x00000000, 0x00404811, 0x200 },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x23a },
- { 0x00000000, 0x28e00000, 0x205 },
+ { 0x00000000, 0x0ae00000, 0x235 },
+ { 0x00000000, 0x28e00000, 0x200 },
{ 0x00800080, 0x00281e2e, 0x000 },
{ 0x00000080, 0x002f0227, 0x000 },
- { 0x00000000, 0x0ce00000, 0x202 },
- { 0x00000000, 0x00401c0c, 0x203 },
+ { 0x00000000, 0x0ce00000, 0x1fd },
+ { 0x00000000, 0x00401c0c, 0x1fe },
{ 0x00000010, 0x00201e2d, 0x000 },
{ 0x000021f9, 0x00294627, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x20c },
+ { 0x00000000, 0x0ae00000, 0x207 },
{ 0x00000003, 0x00204811, 0x000 },
{ 0x0000000c, 0x0020162d, 0x000 },
{ 0x0000000d, 0x00201a2d, 0x000 },
- { 0xffdfffff, 0x00483a2e, 0x210 },
+ { 0xffdfffff, 0x00483a2e, 0x20b },
{ 0x00000004, 0x00204811, 0x000 },
{ 0x0000000e, 0x0020162d, 0x000 },
{ 0x0000000f, 0x00201a2d, 0x000 },
{ 0xffefffff, 0x00283a2e, 0x000 },
{ 0x00000000, 0x00201c10, 0x000 },
{ 0x00000000, 0x002f0067, 0x000 },
- { 0x00000000, 0x04e00000, 0x205 },
+ { 0x00000000, 0x04e00000, 0x200 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000006, 0x00204811, 0x000 },
{ 0x8300ffff, 0x00204411, 0x000 },
@@ -578,10 +575,10 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x8400ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00204803, 0x000 },
{ 0x00000000, 0x21000000, 0x000 },
- { 0x00000000, 0x00601010, 0x28c },
+ { 0x00000000, 0x00601010, 0x287 },
{ 0x0000000c, 0x00221e24, 0x000 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x22d },
+ { 0x00000000, 0x0ae00000, 0x228 },
{ 0x20000000, 0x00293a2e, 0x000 },
{ 0x000021f7, 0x0029462c, 0x000 },
{ 0x00000000, 0x002948c7, 0x000 },
@@ -594,7 +591,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00204803, 0x000 },
{ 0x00000000, 0x23000000, 0x000 },
{ 0x8d00ffff, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x240 },
+ { 0x00000000, 0x00404803, 0x23b },
{ 0x00800000, 0x00293a2e, 0x000 },
{ 0x000021f6, 0x0029462c, 0x000 },
{ 0x00000000, 0x002948c7, 0x000 },
@@ -607,7 +604,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00204803, 0x000 },
{ 0x00000000, 0x25000000, 0x000 },
{ 0x8e00ffff, 0x00204411, 0x000 },
- { 0x00000000, 0x00404803, 0x240 },
+ { 0x00000000, 0x00404803, 0x23b },
{ 0x8300ffff, 0x00204411, 0x000 },
{ 0x00000003, 0x00381224, 0x000 },
{ 0x00005000, 0x00304a24, 0x000 },
@@ -621,37 +618,37 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000001, 0x00204811, 0x000 },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x24a },
+ { 0x00000000, 0x0ae00000, 0x245 },
{ 0x000021f6, 0x0029122c, 0x000 },
- { 0x00040000, 0x00494624, 0x24c },
+ { 0x00040000, 0x00494624, 0x247 },
{ 0x000021f7, 0x0029122c, 0x000 },
{ 0x00040000, 0x00294624, 0x000 },
- { 0x00000000, 0x00600000, 0x2b2 },
+ { 0x00000000, 0x00600000, 0x2b4 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x252 },
+ { 0x00000000, 0x0ce00000, 0x24d },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ce00000, 0x252 },
- { 0x00000000, 0x00481630, 0x258 },
+ { 0x00000000, 0x0ce00000, 0x24d },
+ { 0x00000000, 0x00481630, 0x253 },
{ 0x00000fff, 0x00281630, 0x000 },
{ 0x0000000c, 0x00211a30, 0x000 },
{ 0x00000fff, 0x00281a26, 0x000 },
{ 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0ae00000, 0x258 },
+ { 0x00000000, 0x0ae00000, 0x253 },
{ 0x00000000, 0xc0400000, 0x000 },
- { 0x00040d02, 0x00604411, 0x2b2 },
+ { 0x00040d02, 0x00604411, 0x2b4 },
{ 0x00000000, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x25d },
+ { 0x00000000, 0x0ae00000, 0x258 },
{ 0x00000010, 0x00211e30, 0x000 },
- { 0x00000fff, 0x00482630, 0x267 },
+ { 0x00000fff, 0x00482630, 0x262 },
{ 0x00000001, 0x002f0222, 0x000 },
- { 0x00000000, 0x0ae00000, 0x261 },
+ { 0x00000000, 0x0ae00000, 0x25c },
{ 0x00000fff, 0x00281e30, 0x000 },
- { 0x00000200, 0x00402411, 0x267 },
+ { 0x00000200, 0x00402411, 0x262 },
{ 0x00000000, 0x00281e30, 0x000 },
{ 0x00000010, 0x00212630, 0x000 },
{ 0x00000010, 0x00211a30, 0x000 },
{ 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0ae00000, 0x258 },
+ { 0x00000000, 0x0ae00000, 0x253 },
{ 0x00000000, 0xc0400000, 0x000 },
{ 0x00000003, 0x00381625, 0x000 },
{ 0x00000003, 0x00381a26, 0x000 },
@@ -662,13 +659,13 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0xc0204800, 0x000 },
{ 0x00000000, 0x00204806, 0x000 },
{ 0x00005000, 0x00302225, 0x000 },
- { 0x00040000, 0x00694628, 0x2b2 },
+ { 0x00040000, 0x00694628, 0x2b4 },
{ 0x00000001, 0x00302228, 0x000 },
{ 0x00000000, 0x00202810, 0x000 },
- { 0x00040000, 0x00694628, 0x2b2 },
+ { 0x00040000, 0x00694628, 0x2b4 },
{ 0x00000001, 0x00302228, 0x000 },
{ 0x00000000, 0x00200810, 0x000 },
- { 0x00040000, 0x00694628, 0x2b2 },
+ { 0x00040000, 0x00694628, 0x2b4 },
{ 0x00000001, 0x00302228, 0x000 },
{ 0x00000000, 0x00201410, 0x000 },
{ 0x0000060d, 0x00204411, 0x000 },
@@ -678,35 +675,42 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00204802, 0x000 },
{ 0x00000000, 0x00204805, 0x000 },
{ 0x00000000, 0x002f0128, 0x000 },
- { 0x00000000, 0x0ae00000, 0x282 },
+ { 0x00000000, 0x0ae00000, 0x27d },
{ 0x00005000, 0x00302227, 0x000 },
{ 0x0000000c, 0x00300e23, 0x000 },
{ 0x00000003, 0x00331a26, 0x000 },
{ 0x00000000, 0x002f0226, 0x000 },
- { 0x00000000, 0x0ae00000, 0x270 },
+ { 0x00000000, 0x0ae00000, 0x26b },
{ 0x00000000, 0x00400000, 0x000 },
{ 0x000001f3, 0x00204411, 0x000 },
{ 0x04000000, 0x00204811, 0x000 },
- { 0x00000000, 0x00400000, 0x289 },
- { 0x00000000, 0xc0600000, 0x28c },
+ { 0x00000000, 0x00400000, 0x284 },
+ { 0x00000000, 0xc0600000, 0x287 },
{ 0x00000000, 0x00400000, 0x000 },
- { 0x00000000, 0x0ec00000, 0x28e },
+ { 0x00000000, 0x0ec00000, 0x289 },
{ 0x00000000, 0x00800000, 0x000 },
{ 0x000021f9, 0x0029462c, 0x000 },
{ 0x00000005, 0x00204811, 0x000 },
+ { 0x8100ffff, 0x00204411, 0x000 },
+ { 0x00000002, 0x00204811, 0x000 },
+ { 0x0000000a, 0x0021262c, 0x000 },
+ { 0x00000000, 0x00210130, 0x000 },
+ { 0x00000000, 0x14c00000, 0x292 },
+ { 0xa500ffff, 0x00204411, 0x000 },
+ { 0x00000001, 0x00404811, 0x28e },
{ 0x00000000, 0x0020280c, 0x000 },
{ 0x00000011, 0x0020262d, 0x000 },
{ 0x00000000, 0x002f012c, 0x000 },
- { 0x00000000, 0x0ae00000, 0x295 },
- { 0x00000000, 0x00403011, 0x296 },
+ { 0x00000000, 0x0ae00000, 0x297 },
+ { 0x00000000, 0x00403011, 0x298 },
{ 0x00000400, 0x0030322c, 0x000 },
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000002, 0x00204811, 0x000 },
{ 0x0000000a, 0x0021262c, 0x000 },
{ 0x00000000, 0x00210130, 0x000 },
- { 0x00000000, 0x14c00000, 0x29d },
+ { 0x00000000, 0x14c00000, 0x29f },
{ 0xa500ffff, 0x00204411, 0x000 },
- { 0x00000001, 0x00404811, 0x299 },
+ { 0x00000001, 0x00404811, 0x29b },
{ 0xa500ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x00204811, 0x000 },
{ 0x000021f4, 0x0029462c, 0x000 },
@@ -718,6 +722,8 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00210130, 0x000 },
{ 0xdf7fffff, 0x00283a2e, 0x000 },
{ 0x00000010, 0x0080362a, 0x000 },
+ { 0x00000000, 0x00203011, 0x000 },
+ { 0x00000010, 0x0080362c, 0x000 },
{ 0x9700ffff, 0x00204411, 0x000 },
{ 0x00000000, 0x0020480c, 0x000 },
{ 0xa200ffff, 0x00204411, 0x000 },
@@ -725,13 +731,11 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x8100ffff, 0x00204411, 0x000 },
{ 0x00000002, 0x00204811, 0x000 },
{ 0x00000000, 0x00810130, 0x000 },
- { 0x00000000, 0x00203011, 0x000 },
- { 0x00000010, 0x0080362c, 0x000 },
{ 0x00000000, 0xc0400000, 0x000 },
- { 0x00000000, 0x1ac00000, 0x2b2 },
+ { 0x00000000, 0x1ac00000, 0x2b4 },
{ 0x9f00ffff, 0x00204411, 0x000 },
{ 0xdeadbeef, 0x00204811, 0x000 },
- { 0x00000000, 0x1ae00000, 0x2b5 },
+ { 0x00000000, 0x1ae00000, 0x2b7 },
{ 0x00000000, 0x00800000, 0x000 },
{ 0x00000000, 0x00000000, 0x000 },
{ 0x00000000, 0x00000000, 0x000 },
@@ -776,28 +780,26 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00000000, 0x00000000, 0x000 },
{ 0x00000000, 0x00000000, 0x000 },
{ 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00000000, 0x00000000, 0x000 },
- { 0x00020143, 0x00020002, 0x000 },
+ { 0x0002013e, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
- { 0x00020002, 0x01dd0002, 0x000 },
- { 0x006301ee, 0x00280012, 0x000 },
+ { 0x00020002, 0x01d80002, 0x000 },
+ { 0x005e01e9, 0x00280012, 0x000 },
{ 0x00020002, 0x00020026, 0x000 },
- { 0x00020002, 0x01ec0002, 0x000 },
- { 0x00790242, 0x00020002, 0x000 },
+ { 0x00020002, 0x01e70002, 0x000 },
+ { 0x0074023d, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00200012, 0x00020016, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
- { 0x011b00c5, 0x00020125, 0x000 },
- { 0x00020141, 0x00020002, 0x000 },
- { 0x00c50002, 0x0143002e, 0x000 },
- { 0x00a2016b, 0x00020145, 0x000 },
- { 0x00020002, 0x01200002, 0x000 },
- { 0x00020002, 0x010f0103, 0x000 },
+ { 0x011600c0, 0x00020120, 0x000 },
+ { 0x0002013c, 0x00020002, 0x000 },
+ { 0x00c00002, 0x013e002e, 0x000 },
+ { 0x009d0166, 0x00020140, 0x000 },
+ { 0x00020002, 0x011b0002, 0x000 },
+ { 0x00020002, 0x010a00fe, 0x000 },
{ 0x00090002, 0x000e000e, 0x000 },
- { 0x0058003d, 0x00600002, 0x000 },
- { 0x000200c1, 0x0002028a, 0x000 },
+ { 0x0049003d, 0x005b0002, 0x000 },
+ { 0x000200bc, 0x00020285, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
@@ -805,7 +807,7 @@ uint32 aPM4_Microcode[PM4_MICROCODE_SIZE][3]={
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
{ 0x00020002, 0x00020002, 0x000 },
- { 0x000502b1, 0x00020008, 0x000 },
+ { 0x000502b3, 0x00020008, 0x000 },
};
#endif
diff --git a/drivers/mxc/amd-gpu/include/gsl_buildconfig.h b/drivers/mxc/amd-gpu/include/gsl_buildconfig.h
index 4e6be4da7dc4..73be13c4a725 100644
--- a/drivers/mxc/amd-gpu/include/gsl_buildconfig.h
+++ b/drivers/mxc/amd-gpu/include/gsl_buildconfig.h
@@ -27,7 +27,7 @@
*/
/*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#ifndef __GSL__BUILDCONFIG_H
@@ -49,7 +49,7 @@
/* #define GSL_MMU_PAGETABLE_PERPROCESS */
-#define GSL_CALLER_PROCESS_MAX 10
+#define GSL_CALLER_PROCESS_MAX 64
#define GSL_SHMEM_MAX_APERTURES 3
#endif /* __GSL__BUILDCONFIG_H */
diff --git a/drivers/mxc/amd-gpu/include/gsl_halconfig.h b/drivers/mxc/amd-gpu/include/gsl_halconfig.h
index 363474b7a6bb..17e61a37f297 100644
--- a/drivers/mxc/amd-gpu/include/gsl_halconfig.h
+++ b/drivers/mxc/amd-gpu/include/gsl_halconfig.h
@@ -27,7 +27,7 @@
*/
/*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#ifndef __GSL_HALCONFIG_H
@@ -38,7 +38,7 @@
#define GSL_HAL_SIZE_REG_G12 0x00001000 /* 4KB */
-#define GSL_HAL_SHMEM_SIZE_EMEM1_MMU 0x01800000 /* 24MB */
+#define GSL_HAL_SHMEM_SIZE_EMEM1_MMU 0x08000000 /* 128MB */
#define GSL_HAL_SHMEM_SIZE_EMEM2_MMU 0x00400000 /* 4MB */
#define GSL_HAL_SHMEM_SIZE_PHYS_MMU 0x00400000 /* 4MB */
diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c
index 51270ada4d36..8b271a79c52b 100644
--- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c
+++ b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hal.c
@@ -1,5 +1,5 @@
/* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved.
- * Copyright (C) 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,7 @@
*/
/*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include "gsl_hal.h"
@@ -49,6 +49,7 @@ extern int gmem_size;
extern phys_addr_t gpu_reserved_mem;
extern int gpu_reserved_mem_size;
extern int gpu_2d_irq, gpu_3d_irq;
+extern int enable_mmu;
KGSLHAL_API int
@@ -121,8 +122,7 @@ kgsl_hal_init(void)
hal->has_z160 = 0;
}
- /* there is still some problem to enable mmu currently */
- gsl_driver.enable_mmu = 0;
+ gsl_driver.enable_mmu = enable_mmu;
/* setup register space */
if (hal->has_z430) {
@@ -160,6 +160,7 @@ kgsl_hal_init(void)
}
if (gsl_driver.enable_mmu) {
+ printk(KERN_INFO "gpu mmu enabled\n");
totalsize = GSL_HAL_SHMEM_SIZE_EMEM2_MMU + GSL_HAL_SHMEM_SIZE_PHYS_MMU;
mem1size = GSL_HAL_SHMEM_SIZE_EMEM1_MMU;
if (gpu_reserved_mem && gpu_reserved_mem_size >= totalsize) {
@@ -173,6 +174,7 @@ kgsl_hal_init(void)
va = (unsigned int)dma_alloc_coherent(0, totalsize, (dma_addr_t *)&pa, GFP_DMA | GFP_KERNEL);
}
} else {
+ printk(KERN_INFO "gpu mmu disabled\n");
if (gpu_reserved_mem && gpu_reserved_mem_size >= SZ_8M) {
totalsize = gpu_reserved_mem_size;
pa = gpu_reserved_mem;
diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h
index 305b2ee9066d..96abace9b736 100644
--- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h
+++ b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_hwaccess.h
@@ -43,8 +43,6 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u
if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) {
gsl_linux_map_read(dst, gpubase+gpuoffset, sizebytes, touserspace);
} else {
- mb();
- dsb();
if (touserspace)
{
if (copy_to_user(dst, (void *)(gpubase + gpuoffset), sizebytes))
@@ -56,8 +54,6 @@ kgsl_hwaccess_memread(void *dst, unsigned int gpubase, unsigned int gpuoffset, u
{
kos_memcpy(dst, (void *) (gpubase + gpuoffset), sizebytes);
}
- mb();
- dsb();
}
}
@@ -69,8 +65,6 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src,
if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) {
gsl_linux_map_write(src, gpubase+gpuoffset, sizebytes, fromuserspace);
} else {
- mb();
- dsb();
if (fromuserspace)
{
if (copy_from_user((void *)(gpubase + gpuoffset), src, sizebytes))
@@ -82,8 +76,6 @@ kgsl_hwaccess_memwrite(unsigned int gpubase, unsigned int gpuoffset, void *src,
{
kos_memcpy((void *)(gpubase + gpuoffset), src, sizebytes);
}
- mb();
- dsb();
}
}
@@ -95,11 +87,7 @@ kgsl_hwaccess_memset(unsigned int gpubase, unsigned int gpuoffset, unsigned int
if (gsl_driver.enable_mmu && (gpubase >= GSL_LINUX_MAP_RANGE_START) && (gpubase < GSL_LINUX_MAP_RANGE_END)) {
gsl_linux_map_set(gpuoffset+gpubase, value, sizebytes);
} else {
- mb();
- dsb();
kos_memset((void *)(gpubase + gpuoffset), value, sizebytes);
- mb();
- dsb();
}
}
@@ -115,11 +103,7 @@ kgsl_hwaccess_regread(gsl_deviceid_t device_id, unsigned int gpubase, unsigned i
reg = (unsigned int *)(gpubase + (offsetwords << 2));
- mb();
- dsb();
- *data = __raw_readl(reg);
- mb();
- dsb();
+ *data = readl(reg);
}
//----------------------------------------------------------------------------
@@ -133,10 +117,6 @@ kgsl_hwaccess_regwrite(gsl_deviceid_t device_id, unsigned int gpubase, unsigned
(void) device_id;
reg = (unsigned int *)(gpubase + (offsetwords << 2));
- mb();
- dsb();
- __raw_writel(data, reg);
- mb();
- dsb();
+ writel(data, reg);
}
#endif // __GSL_HWACCESS_WINCE_MX51_H
diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c
index b67404150e10..2fc2ef7addf5 100644
--- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c
+++ b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_kmod.c
@@ -1,5 +1,5 @@
/* Copyright (c) 2008-2010, Advanced Micro Devices. All rights reserved.
- * Copyright (C) 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,14 +32,16 @@
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/interrupt.h>
+#include <asm/uaccess.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <linux/cdev.h>
+
#include <linux/platform_device.h>
#include <linux/vmalloc.h>
-#include <linux/uaccess.h>
#include <mach/mxc_gpu.h>
+#include <linux/fsl_devices.h>
int gpu_2d_irq, gpu_3d_irq;
@@ -51,6 +53,7 @@ int gmem_size;
phys_addr_t gpu_reserved_mem;
int gpu_reserved_mem_size;
int z160_version;
+int enable_mmu;
static ssize_t gsl_kmod_read(struct file *fd, char __user *buf, size_t len, loff_t *ptr);
static ssize_t gsl_kmod_write(struct file *fd, const char __user *buf, size_t len, loff_t *ptr);
@@ -769,14 +772,15 @@ static int gpu_probe(struct platform_device *pdev)
int i;
struct resource *res;
struct device *dev;
- struct mxc_gpu_platform_data *pdata;
+ struct mxc_gpu_platform_data *gpu_data = NULL;
- pdata = pdev->dev.platform_data;
- if (pdata) {
- z160_version = pdata->z160_revision;
- gpu_reserved_mem = pdata->reserved_mem_base;
- gpu_reserved_mem_size = pdata->reserved_mem_size;
- }
+ gpu_data = (struct mxc_gpu_platform_data *)pdev->dev.platform_data;
+
+ if (gpu_data == NULL)
+ return 0;
+
+ z160_version = gpu_data->z160_revision;
+ enable_mmu = gpu_data->enable_mmu;
for(i = 0; i < 2; i++){
res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
@@ -795,8 +799,8 @@ static int gpu_probe(struct platform_device *pdev)
}
}
- for (i = 0; i < 3; i++) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ for (i = 0; i < 4; i++) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
if (!res) {
gpu_2d_regbase = 0;
gpu_2d_regsize = 0;
@@ -807,14 +811,17 @@ static int gpu_probe(struct platform_device *pdev)
gpu_reserved_mem_size = 0;
break;
}else{
- if(strcmp(res->name, "gpu_2d_registers") == 0){
- gpu_2d_regbase = res->start;
- gpu_2d_regsize = res->end - res->start + 1;
- }else if(strcmp(res->name, "gpu_3d_registers") == 0){
- gpu_3d_regbase = res->start;
- gpu_3d_regsize = res->end - res->start + 1;
- }else if(strcmp(res->name, "gpu_graphics_mem") == 0){
- gmem_size = res->end - res->start + 1;
+ if (strcmp(res->name, "gpu_2d_registers") == 0) {
+ gpu_2d_regbase = res->start;
+ gpu_2d_regsize = res->end - res->start + 1;
+ } else if (strcmp(res->name, "gpu_3d_registers") == 0) {
+ gpu_3d_regbase = res->start;
+ gpu_3d_regsize = res->end - res->start + 1;
+ } else if (strcmp(res->name, "gpu_graphics_mem") == 0) {
+ gmem_size = res->end - res->start + 1;
+ } else if (strcmp(res->name, "gpu_reserved_mem") == 0) {
+ gpu_reserved_mem = res->start;
+ gpu_reserved_mem_size = res->end - res->start + 1;
}
}
}
diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c
index 7fee7b814411..3c1e02e5bc42 100644
--- a/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c
+++ b/drivers/mxc/amd-gpu/platform/hal/linux/gsl_linux_map.c
@@ -61,7 +61,7 @@ void *gsl_linux_map_alloc(unsigned int gpu_addr, unsigned int size)
}
}
- va = __vmalloc(size, GFP_KERNEL, pgprot_noncached(pgprot_kernel));
+ va = __vmalloc(size, GFP_KERNEL, pgprot_writecombine(pgprot_kernel));
if(va == NULL){
mutex_unlock(&gsl_linux_map_mutex);
return NULL;
diff --git a/drivers/mxc/amd-gpu/platform/hal/linux/misc.c b/drivers/mxc/amd-gpu/platform/hal/linux/misc.c
index bd0623baac54..23aca825aa36 100644
--- a/drivers/mxc/amd-gpu/platform/hal/linux/misc.c
+++ b/drivers/mxc/amd-gpu/platform/hal/linux/misc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -38,7 +38,7 @@ typedef struct _gsl_autogate_t {
} gsl_autogate_t;
static gsl_autogate_t *g_autogate[2];
-static DEFINE_SEMAPHORE(sem_dev);
+static DEFINE_MUTEX(sem_dev);
#define KGSL_DEVICE_IDLE_TIMEOUT 2000 /* unit ms */
@@ -79,10 +79,10 @@ static int _kgsl_device_active(gsl_device_t *dev, int all)
int index;
index = autogate->dev->id == GSL_DEVICE_G12 ? GSL_DEVICE_YAMATO - 1 :
GSL_DEVICE_G12 - 1;
- down(&sem_dev);
+ mutex_lock(&sem_dev);
if (g_autogate[index])
_kgsl_device_active(g_autogate[index]->dev, 0);
- up(&sem_dev);
+ mutex_unlock(&sem_dev);
}
return 0;
}
@@ -137,7 +137,7 @@ int kgsl_device_autogate_init(gsl_device_t *dev)
printk(KERN_ERR "%s: out of memory!\n", __func__);
return -ENOMEM;
}
- down(&sem_dev);
+ mutex_lock(&sem_dev);
autogate->dev = dev;
autogate->active = 1;
spin_lock_init(&autogate->lock);
@@ -150,7 +150,7 @@ int kgsl_device_autogate_init(gsl_device_t *dev)
INIT_WORK(&autogate->dis_task, clk_disable_task);
dev->autogate = autogate;
g_autogate[dev->id - 1] = autogate;
- up(&sem_dev);
+ mutex_unlock(&sem_dev);
return 0;
}
@@ -159,13 +159,13 @@ void kgsl_device_autogate_exit(gsl_device_t *dev)
gsl_autogate_t *autogate = dev->autogate;
// printk(KERN_ERR "%s:%d id %d active %d\n", __func__, __LINE__, dev->id, autogate->active);
- down(&sem_dev);
+ mutex_lock(&sem_dev);
del_timer_sync(&autogate->timer);
if (!autogate->active)
kgsl_clock(autogate->dev->id, 1);
flush_work(&autogate->dis_task);
g_autogate[dev->id - 1] = NULL;
- up(&sem_dev);
+ mutex_unlock(&sem_dev);
kfree(autogate);
dev->autogate = NULL;
}
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c
index e7713199abcb..b29402539582 100644
--- a/drivers/mxc/ipu3/ipu_common.c
+++ b/drivers/mxc/ipu3/ipu_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -490,6 +490,10 @@ static int __devinit ipu_probe(struct platform_device *pdev)
/* Set sync refresh channels and CSI->mem channel as high priority */
ipu_idmac_write(ipu, 0x18800001L, IDMAC_CHA_PRI(0));
+ /* AXI burst setting for sync refresh channels */
+ if (g_ipu_hw_rev == 3)
+ ipu_idmac_write(ipu, 0x003F0000, IDMAC_CH_LOCK_EN_1);
+
/* Set MCU_T to divide MCU access window into 2 */
ipu_cm_write(ipu, 0x00400000L | (IPU_MCU_T_DEFAULT << 18), IPU_DISP_GEN);
@@ -1095,6 +1099,13 @@ void ipu_uninit_channel(struct ipu_soc *ipu, ipu_channel_t channel)
ipu->channel_init_mask &= ~(1L << IPU_CHAN_ID(channel));
+ /* Restore IDMAC_LOCK_EN when we don't use dual display */
+ /* and the video mode for single display is not tough */
+ if (!(ipu->di_use_count[0] && ipu->di_use_count[1]) &&
+ dmfc_type_setup != DMFC_HIGH_RESOLUTION_ONLY_DP &&
+ _ipu_is_dmfc_chan(in_dma) && g_ipu_hw_rev == 3)
+ ipu_idmac_write(ipu, 0x003F0000, IDMAC_CH_LOCK_EN_1);
+
_ipu_unlock(ipu);
_ipu_put(ipu);
@@ -1259,7 +1270,7 @@ int32_t ipu_init_channel_buffer(struct ipu_soc *ipu, ipu_channel_t channel,
if (idma_is_set(ipu, IDMAC_CHA_PRI, dma_chan)) {
unsigned reg = IDMAC_CH_LOCK_EN_1;
uint32_t value = 0;
- if (cpu_is_mx53() || cpu_is_mx6q()) {
+ if (cpu_is_mx6q()) {
_ipu_ch_param_set_axi_id(ipu, dma_chan, 0);
switch (dma_chan) {
case 5:
@@ -1985,6 +1996,16 @@ int32_t ipu_enable_channel(struct ipu_soc *ipu, ipu_channel_t channel)
ipu_conf |= IPU_CONF_SMFC_EN;
ipu_cm_write(ipu, ipu_conf, IPU_CONF);
+ /* Clear IDMAC_LOCK_EN to workaround black flash for dual display */
+ /* and for tough video mode of single display */
+ if (g_ipu_hw_rev == 3 && _ipu_is_dmfc_chan(in_dma)) {
+ if ((ipu->di_use_count[1] && ipu->di_use_count[0]) ||
+ (dmfc_type_setup == DMFC_HIGH_RESOLUTION_ONLY_DP))
+ ipu_idmac_write(ipu, 0x0, IDMAC_CH_LOCK_EN_1);
+ else
+ ipu_idmac_write(ipu, 0x003F0000, IDMAC_CH_LOCK_EN_1);
+ }
+
if (idma_is_valid(in_dma)) {
reg = ipu_idmac_read(ipu, IDMAC_CHA_EN(in_dma));
ipu_idmac_write(ipu, reg | idma_mask(in_dma), IDMAC_CHA_EN(in_dma));
@@ -2095,15 +2116,22 @@ void _ipu_clear_buffer_ready(struct ipu_soc *ipu, ipu_channel_t channel, ipu_buf
return;
ipu_cm_write(ipu, 0xF0300000, IPU_GPR); /* write one to clear */
- if (bufNum == 0)
- ipu_cm_write(ipu, idma_mask(dma_ch),
+ if (bufNum == 0) {
+ if (idma_is_set(ipu, IPU_CHA_BUF0_RDY, dma_ch)) {
+ ipu_cm_write(ipu, idma_mask(dma_ch),
IPU_CHA_BUF0_RDY(dma_ch));
- else if (bufNum == 1)
- ipu_cm_write(ipu, idma_mask(dma_ch),
+ }
+ } else if (bufNum == 1) {
+ if (idma_is_set(ipu, IPU_CHA_BUF1_RDY, dma_ch)) {
+ ipu_cm_write(ipu, idma_mask(dma_ch),
IPU_CHA_BUF1_RDY(dma_ch));
- else
- ipu_cm_write(ipu, idma_mask(dma_ch),
+ }
+ } else {
+ if (idma_is_set(ipu, IPU_CHA_BUF2_RDY, dma_ch)) {
+ ipu_cm_write(ipu, idma_mask(dma_ch),
IPU_CHA_BUF2_RDY(dma_ch));
+ }
+ }
ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */
}
@@ -2935,6 +2963,11 @@ static int ipu_resume_noirq(struct device *dev)
_ipu_init_dc_mappings(ipu);
/* Set sync refresh channels as high priority */
ipu_idmac_write(ipu, 0x18800001L, IDMAC_CHA_PRI(0));
+
+ /* AXI burst setting for sync refresh channels */
+ if (g_ipu_hw_rev == 3)
+ ipu_idmac_write(ipu, 0x003F0000, IDMAC_CH_LOCK_EN_1);
+
_ipu_put(ipu);
}
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 3ca487da1272..83b8e8c22a6e 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -19,7 +19,7 @@
* Copyright (c) 2004-2006 Macq Electronique SA.
*
* Support for FEC IEEE 1588.
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
*/
#include <linux/module.h>
@@ -1417,6 +1417,7 @@ fec_restart(struct net_device *dev, int duplex)
val |= (1 << 9);
writel(val, fep->hwp + FEC_R_CNTRL);
+ }
if (fep->ptimer_present) {
/* Set Timer count */
@@ -1450,7 +1451,6 @@ fec_restart(struct net_device *dev, int duplex)
writel(2, fep->hwp + FEC_MIIGSK_ENR);
}
#endif
- }
/* ENET enable */
val = reg | (0x1 << 1);
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 9fa20957847d..bcb955ed1959 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1126,6 +1126,12 @@ static struct regulator *_regulator_get(struct device *dev, const char *id,
}
}
+ list_for_each_entry(rdev, &regulator_list, list) {
+ if (strcmp(rdev->desc->name, id) == 0) {
+ goto found;
+ }
+ }
+
if (board_wants_dummy_regulator) {
rdev = dummy_regulator_rdev;
goto found;