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| author | Fugang Duan <b38611@freescale.com> | 2015-04-23 09:32:43 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2015-05-08 17:26:47 +0800 |
| commit | 6202910161fee4ce5ea14c30de79b9e661895938 (patch) | |
| tree | 2643d4e84f0c5dd5513163b73bb047b5e55d7aaf | |
| parent | 495fbe29d087383ab08cc49fba7be84bbc6530c0 (diff) | |
MLK-10726 ARM: dts: imx7d-sdb: correct uart6 assigned clocks
The issue is introduced by the commit:
2b640b0f16e4b6b549ae466011ab9b96778162c9
Correct uart6 assigned clock parent, otherwise the default parent clock
is 24Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx7d-sdb.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index 50da20b8db28..381c78c6e595 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -896,7 +896,7 @@ &uart6 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart6>; - assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; fsl,uart-has-rtscts; status = "okay"; |