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authorRanjani Vaidyanathan <ra5478@freescale.com>2011-01-25 14:16:57 -0600
committerRanjani Vaidyanathan <ra5478@freescale.com>2011-01-25 14:59:32 -0600
commita9d547c7b51574323784b0f80d383eab62a16769 (patch)
treeedb448f0cd9620d98e72e679ac494c2237bf9f9e
parent75749fa549a99e5bb325d47a94d4ae7a0a9c7e7e (diff)
ENGR00138516: MX5X: Initialize CPU working point correctly for DVFS-CORE
CPU working point needs to be initialized based on the current CPU frequency in start_dvfs() and should correspond with the correct entry in the cpu_wp_auto table. If its not initialized correctly, DVFS-CORE will fail when PLL-relock results in a frequency that is not the same as set in the cpu_wp_auto table. So fix it by finding the entry that closely matches the CPU frequency. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r--arch/arm/plat-mxc/dvfs_core.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/plat-mxc/dvfs_core.c b/arch/arm/plat-mxc/dvfs_core.c
index 807fa63141ad..8830dce17e5f 100644
--- a/arch/arm/plat-mxc/dvfs_core.c
+++ b/arch/arm/plat-mxc/dvfs_core.c
@@ -370,12 +370,11 @@ static int start_dvfs(void)
/* get current working point */
cpu_rate = clk_get_rate(cpu_clk);
- for (curr_wp = 0; curr_wp < cpu_wp_nr; curr_wp++)
- if (cpu_rate == cpu_wp_tbl[curr_wp].cpu_rate)
+ curr_wp = cpu_wp_nr - 1;
+ do {
+ if (cpu_rate <= cpu_wp_tbl[curr_wp].cpu_rate)
break;
- /* if doesn't find it, set it as the lowest point */
- if (curr_wp == cpu_wp_nr)
- curr_wp--;
+ } while (--curr_wp >= 0);
old_wp = curr_wp;
/* config reg GPC_CNTR */
reg = __raw_readl(gpc_base + dvfs_data->gpc_cntr_offset);