diff options
author | Nicolin Chen <Guangyu.Chen@freescale.com> | 2014-07-18 18:15:48 +0800 |
---|---|---|
committer | Nicolin Chen <Guangyu.Chen@freescale.com> | 2014-07-18 18:54:46 +0800 |
commit | b85f840a60de8d0a5ca8fbe7eda15f611ff5b622 (patch) | |
tree | b6bcf00f2a9fc97f8fb281fa87f5b93652994c2c | |
parent | 8532e80d479ef7ea61e288b321c10d1b14933196 (diff) |
ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after disabling TE/RE
SAI will not clear their FIFOs after disabling TE/RE. Therfore, the driver
should take care the task so as not to let useless data remain in the FIFO.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
-rw-r--r-- | sound/soc/fsl/fsl_sai.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 896f40a91def..37c950779694 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -371,10 +371,15 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, /* Check if the opposite FRDE is also disabled */ if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) { + /* Disable both directions and reset their FIFOs */ regmap_update_bits(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_TERE, 0); regmap_update_bits(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_TERE, 0); + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, + FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, + FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); } break; default: |