diff options
| author | Krishna Reddy <vdumpa@nvidia.com> | 2012-03-06 19:12:45 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-08 15:18:32 -0800 |
| commit | 38449f5ab76e7208034b5f4c8c774c3d0c0617be (patch) | |
| tree | a22b7f05d0a2e545d2f4176a7d45148999329865 | |
| parent | 30bc36f606443f5f4b6873e769f401a4ac87c33a (diff) | |
ARM: tegra: Enable CPA.
Change-Id: I24725e7d98226e56af7ca06c91c05277a7eb1fdd
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/88443
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index c25381e70319..7e9785a0581c 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -20,6 +20,7 @@ config ARCH_TEGRA_2x_SOC select USB_ULPI_VIEWPORT if USB_SUPPORT select ARCH_SUPPORTS_MSI if TEGRA_PCI select PCI_MSI if TEGRA_PCI + select CPA help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -44,6 +45,7 @@ config ARCH_TEGRA_3x_SOC select PCI_MSI if TEGRA_PCI select ARM_ERRATA_754322 select TEGRA_LP2_ARM_TWD if HAVE_ARM_TWD && !TEGRA_RAIL_OFF_MULTIPLE_CPUS + select CPA help Support for NVIDIA Tegra 3 family of SoCs, based upon the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |