diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2006-03-25 21:58:00 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-03-25 21:58:00 +0000 |
| commit | 80ed354725825035616fb369a8c38ff77494695c (patch) | |
| tree | 4ef811cc3bcc6d986ac771a9a5217166b887f360 | |
| parent | 1310eda4bec331fd951a8cbe80619f050f9036fc (diff) | |
[ARM] 3398/1: Fix the VFP registers loading/storing base address
Patch from Catalin Marinas
The current VFP code corrupts the VFP registers (including the control
ones) if more than one floating point application is executed at the same
time. This patch fixes the updating of the load/store base addresses for
the VFP registers.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/vfp/vfphw.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index de4ca1223c58..b7ed57e00cd4 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -102,7 +102,6 @@ vfp_support_entry: VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading @ nonexistant reg on rev0 VFPFSTMIA r4 @ save the working registers - add r4, r4, #8*16+4 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 @ and point r4 at the word at the @ start of the register dump @@ -111,10 +110,9 @@ no_old_VFP_process: DBGSTR1 "load state %p", r10 str r10, [r3] @ update the last_VFP_context pointer @ Load the saved state back into the VFP - add r4, r10, #8*16+4 - ldmia r4, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 VFPFLDMIA r10 @ reload the working registers while @ FPEXC is in a safe state + ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write? VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing @ nonexistant reg on rev0 |