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authorsrawat <srawat@nvidia.com>2011-04-19 14:52:04 +0530
committerVarun Colbert <vcolbert@nvidia.com>2011-04-19 20:59:17 -0700
commit2ae7f3fe66ee281def064b91af59e4033785d2aa (patch)
treedc3aaa028643ae2e4c5855bc61e866f1f2b07f8d
parenta730c9649c0764fccf8001e1cacb59879ea5da71 (diff)
ARM: tegra: add address map for bsea
Bug 803932 Change-Id: I61cf41423d08d2f2c19f314269be9e8ee6255b9b Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/28172 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/include/mach/iomap.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 0f86c746dfdc..30617e5cd8f6 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -131,8 +131,11 @@
#define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000
#define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K
-#define TEGRA_VDE_BASE 0x6001A000
-#define TEGRA_VDE_SIZE (SZ_8K + SZ_4K - SZ_256)
+#define TEGRA_BSEA_BASE 0x60010000
+#define TEGRA_BSEA_SIZE SZ_4K
+
+#define TEGRA_VDE_BASE 0x6001A000
+#define TEGRA_VDE_SIZE (SZ_8K + SZ_4K - SZ_256)
#define TEGRA_APB_MISC_BASE 0x70000000
#define TEGRA_APB_MISC_SIZE SZ_4K