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authorKasoju Mallikarjun <mkasoju@nvidia.com>2010-07-19 15:08:06 +0530
committerGary King <gking@nvidia.com>2010-07-19 09:54:11 -0700
commit6fc960d6c86fd76e3d9357adfd6eeeafed0dd2e4 (patch)
treee79b6c1ccae0f95fbd6ea99b795bfa706bcaca99
parent801e6443ef6525dbb0e6e4363ab3b33afe210bdc (diff)
[ARM/tegra] AES:Remove intermediate memcopy in process buffer
Modified AES kernel driver to copy client buffer into DMA buffer instead of copying it to local buffer. This reduces number of memory copies from four to two. Bug 660522 Change-Id: Iafb4aff9c8d10e1bc40bef29ef762174420ec057 Reviewed-on: http://git-master/r/4069 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.c92
-rw-r--r--arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.h8
-rw-r--r--arch/arm/mach-tegra/nvddk/nvddk_aes_intf_ap20.c134
3 files changed, 50 insertions, 184 deletions
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.c b/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.c
index d3296f9dcdc2..b2edb6f19b5d 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.c
@@ -324,8 +324,8 @@ void NvAesCoreAp20LockSskReadWrites(const AesHwEngine Engine, const NvU32 *const
SECURE_HW_REGW(Engine, pEngineVirAddr, SECURE_SEC_SEL4, RegValue);
}
-static void
-AesHwPrivProcessBuffer(
+void
+NvAesCoreAp20ProcessBuffer(
const AesHwEngine Engine,
const NvU32 *const pEngineVirAddr,
const NvU32 SrcPhyAddress,
@@ -361,8 +361,8 @@ AesHwPrivProcessBuffer(
if (AesHwEngine_A == Engine)
{
- RegValue |=
- // Source Stream interface select,
+ RegValue |=
+ // Source Stream interface select,
// (SRC_STM_SEL = 0: through CIF (SDRAM)),
// and (SRC_STM_SEL = 1: through AHB (SDRAM/IRAM)).
SECURE_DRF_NUM(Engine, CMDQUE_CONTROL, SRC_STM_SEL, (SrcPhyAddress & NV_ADDRESS_MAP_IRAM_A_BASE) ? 1 : 0) |
@@ -373,8 +373,8 @@ AesHwPrivProcessBuffer(
}
else
{
- RegValue |=
- // Source Stream interface select,
+ RegValue |=
+ // Source Stream interface select,
// (SRC_STM_SEL = 1: through AHB (SDRAM/IRAM)).
SECURE_DRF_NUM(Engine, CMDQUE_CONTROL, SRC_STM_SEL, 1) |
// Destination Stream interface select,
@@ -496,86 +496,6 @@ AesHwPrivProcessBuffer(
}
void
-NvAesCoreAp20ProcessBuffer(
- const AesHwEngine Engine,
- const NvU32 *const pEngineVirAddr,
- const NvU32 SrcPhyAddress,
- const NvU32 DestPhyAddress,
- const NvU32 DataSize,
- const NvU32 DmaPhyAddr,
- const NvBool IsEncryption,
- const NvU32 OpMode)
-{
- NvU32 TotalBytes = DataSize;
- NvU32 BytesToProcess = 0;
- NvU32 *pSrcVirAddr = NULL;
- NvU32 *pDestVirAddr = NULL;
- NvU32 *pSrcVirAddrTmp = NULL;
- NvU32 *pDestVirAddrTmp = NULL;
- NvU32 *pDmaVirAddr = NULL;
- NvU32 NumBlocks = 0;
- NvError e = NvRmPhysicalMemMap(
- SrcPhyAddress,
- DataSize,
- NVOS_MEM_READ_WRITE,
- NvOsMemAttribute_Uncached,
- (void **)&pSrcVirAddr);
- if (e != NvSuccess)
- return;
-
- e = NvRmPhysicalMemMap(
- DestPhyAddress,
- DataSize,
- NVOS_MEM_READ_WRITE,
- NvOsMemAttribute_Uncached,
- (void **)&pDestVirAddr);
- if (e != NvSuccess)
- {
- NvRmPhysicalMemUnmap(pSrcVirAddr, DataSize);
- return;
- }
-
- NV_CHECK_ERROR_CLEANUP(NvRmPhysicalMemMap(
- DmaPhyAddr,
- AES_HW_DMA_BUFFER_SIZE_BYTES,
- NVOS_MEM_READ_WRITE,
- NvOsMemAttribute_Uncached,
- (void **)&pDmaVirAddr));
-
- pSrcVirAddrTmp = pSrcVirAddr;
- pDestVirAddrTmp = pDestVirAddr;
- while (TotalBytes)
- {
- if (TotalBytes > AES_HW_DMA_BUFFER_SIZE_BYTES)
- BytesToProcess = AES_HW_DMA_BUFFER_SIZE_BYTES;
- else
- BytesToProcess = TotalBytes;
-
- // Copy data to the DMA buffer from the client buffer
- NvOsMemcpy((void *)pDmaVirAddr, (void *)pSrcVirAddrTmp, BytesToProcess);
-
- NumBlocks = BytesToProcess / NvDdkAesConst_BlockLengthBytes;
-
- AesHwPrivProcessBuffer(Engine, pEngineVirAddr, DmaPhyAddr, DmaPhyAddr, NumBlocks, IsEncryption, OpMode);
-
- // Copy data from the DMA buffer to the client buffer
- NvOsMemcpy((void *)pDestVirAddrTmp, (void *)pDmaVirAddr, BytesToProcess);
-
- // Increment the buffer pointer
- pSrcVirAddrTmp += BytesToProcess;
- pDestVirAddrTmp += BytesToProcess;
- TotalBytes -= BytesToProcess;
- }
-
- // UnMap the virtual address
- NvRmPhysicalMemUnmap(pDmaVirAddr, AES_HW_DMA_BUFFER_SIZE_BYTES);
-
-fail:
- NvRmPhysicalMemUnmap(pDestVirAddr, DataSize);
- NvRmPhysicalMemUnmap(pSrcVirAddr, DataSize);
-}
-
-void
NvAesCoreAp20LoadSskToSecureScratchAndLock(
const NvU32 PmicBaseAddr,
const NvU32 *const pKey,
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.h b/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.h
index 3449ad1141e1..1f7188c256f1 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.h
+++ b/arch/arm/mach-tegra/nvddk/nvddk_aes_core_ap20.h
@@ -174,8 +174,7 @@ void NvAesCoreAp20LockSskReadWrites(const AesHwEngine Engine, const NvU32 *const
* @param pEngineVirAddr AES engine virtual address.
* @param SrcPhyAddress The physical address of source buffer.
* @param DestPhyAddress The physical address of destination buffer.
- * @param DataSize The size of buffer.
- * @param DmaPhyAddr The physical address of the DMA.
+ * @param NumBlocks Number of blocks in Source buffer
* @param IsEncryption NV_TRUE if encryption else NV_FALSE.
* @param OpMode Specifies the AES operational mode.
*
@@ -187,10 +186,9 @@ NvAesCoreAp20ProcessBuffer(
const NvU32 *const pEngineVirAddr,
const NvU32 SrcPhyAddress,
const NvU32 DestPhyAddress,
- const NvU32 DataSize,
- const NvU32 DmaPhyAddr,
+ const NvU32 NumBlocks,
const NvBool IsEncryption,
- const NvU32 OpMode);
+ const NvDdkAesOperationalMode OpMode);
/**
* Load the SSK key into secure scratch resgister and disables the write permissions.
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_aes_intf_ap20.c b/arch/arm/mach-tegra/nvddk/nvddk_aes_intf_ap20.c
index 916f33dff843..1c3d5fa44092 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_aes_intf_ap20.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_aes_intf_ap20.c
@@ -420,8 +420,7 @@ Ap20AesHwLockSskReadWrites(
}
/**
- * Encrypt/Decrypt a specified number of blocks of cyphertext using
- * Cipher Block Chaining (CBC) mode. A block is 16 bytes.
+ * Encrypt/Decrypt a specified number of blocks of data. A block is 16 bytes.
* This is non-blocking API and need to call AesHwEngineIdle()
* to check the engine status to confirm the AES engine operation is
* done and comes out of the BUSY state.
@@ -453,13 +452,11 @@ Ap20AesHwStartEngine(
NvU8 *const pDest,
AesHwContext *const pAesHwCtxt)
{
- NvRmMemHandle hSrcMemBuf = NULL;
- NvRmMemHandle hDestMemBuf = NULL;
- NvRmPhysAddr SrcBufferPhyAddr = 0;
- NvRmPhysAddr DestBufferPhyAddr = 0;
- NvU32 *pSrcBufferVirtAddr = NULL;
- NvU32 *pDestBufferVirtAddr = NULL;
- NvError e;
+ NvU32 TotalBytes = DataSize;
+ NvU32 NumBlocks = 0;
+ NvU32 BytesToProcess = 0;
+ NvU8 *pSourceBuffer = (NvU8 *)pSrc;
+ NvU8 *pDestBuffer = pDest;
NV_ASSERT(pAesHwCtxt);
NV_ASSERT(pSrc);
@@ -482,59 +479,8 @@ Ap20AesHwStartEngine(
return NvError_InvalidState;
}
- NV_CHECK_ERROR_CLEANUP(NvRmMemHandleCreate(pAesHwCtxt->hRmDevice, &hSrcMemBuf, DataSize));
- if (!hSrcMemBuf)
- {
- goto fail;
- }
-
- e = NvRmMemHandleCreate(pAesHwCtxt->hRmDevice, &hDestMemBuf, DataSize);
- if (!hDestMemBuf || (e != NvSuccess))
- {
- goto fail1;
- }
-
- e = NvRmMemAlloc(hSrcMemBuf,0, 0, 4, NvOsMemAttribute_Uncached);
- if (e != NvSuccess)
- {
- goto fail2;
- }
-
- e = NvRmMemAlloc(hDestMemBuf,0, 0, 4, NvOsMemAttribute_Uncached);
- if (e != NvSuccess)
- {
- goto fail2;
- }
-
- SrcBufferPhyAddr = NvRmMemPin(hSrcMemBuf);
- DestBufferPhyAddr = NvRmMemPin(hDestMemBuf);
-
- e = NvRmPhysicalMemMap(
- SrcBufferPhyAddr,
- DataSize,
- NVOS_MEM_READ_WRITE,
- NvOsMemAttribute_Uncached,
- (void **)&pSrcBufferVirtAddr);
- if (e != NvSuccess)
- {
- goto fail3;
- }
-
- e = NvRmPhysicalMemMap(
- DestBufferPhyAddr,
- DataSize,
- NVOS_MEM_READ_WRITE,
- NvOsMemAttribute_Uncached,
- (void **)&pDestBufferVirtAddr);
- if (e != NvSuccess)
- {
- goto fail4;
- }
-
NvOsMutexLock(pAesHwCtxt->Mutex[Engine]);
- NvOsMemcpy((NvU8 *)pSrcBufferVirtAddr, pSrc, DataSize);
-
if (DataSize && (!IsEncryption) && (OpMode == NvDdkAesOperationalMode_Cbc))
{
NvOsMemcpy(&pAesHwCtxt->IvContext[Engine].CurIv[pAesHwCtxt->IvContext[Engine].CurKeySlot],
@@ -542,17 +488,41 @@ Ap20AesHwStartEngine(
NvDdkAesConst_BlockLengthBytes);
}
- NvAesCoreAp20ProcessBuffer(
- Engine,
- pAesHwCtxt->pVirAdr[Engine],
- SrcBufferPhyAddr,
- DestBufferPhyAddr,
- DataSize,
- pAesHwCtxt->DmaPhyAddr[Engine],
- IsEncryption,
- OpMode);
+ while (TotalBytes)
+ {
+ if (TotalBytes > AES_HW_DMA_BUFFER_SIZE_BYTES)
+ {
+ BytesToProcess = AES_HW_DMA_BUFFER_SIZE_BYTES;
+ }
+ else
+ {
+ BytesToProcess = TotalBytes;
+ }
- NvOsMemcpy(pDest, (NvU8 *)pDestBufferVirtAddr, DataSize);
+ // Copy data to DMA buffer from the client buffer
+ NvOsMemcpy(pAesHwCtxt->pDmaVirAddr[Engine], (void *)pSourceBuffer, BytesToProcess);
+ NvOsFlushWriteCombineBuffer();
+
+ NumBlocks = BytesToProcess / NvDdkAesConst_BlockLengthBytes;
+
+ NvAesCoreAp20ProcessBuffer(
+ Engine,
+ pAesHwCtxt->pVirAdr[Engine],
+ pAesHwCtxt->DmaPhyAddr[Engine],
+ pAesHwCtxt->DmaPhyAddr[Engine],
+ NumBlocks,
+ IsEncryption,
+ OpMode);
+ NvOsFlushWriteCombineBuffer();
+
+ // Copy data from DMA buffer to the client buffer
+ NvOsMemcpy(pDestBuffer, pAesHwCtxt->pDmaVirAddr[Engine], BytesToProcess);
+
+ // Increment the buffer pointer
+ pSourceBuffer += BytesToProcess;
+ pDestBuffer += BytesToProcess;
+ TotalBytes -= BytesToProcess;
+ }
/**
* If DataSize is zero, Iv would remain unchanged.
@@ -565,31 +535,9 @@ Ap20AesHwStartEngine(
(pDest + DataSize - NvDdkAesConst_BlockLengthBytes),
NvDdkAesConst_BlockLengthBytes);
}
-
NvOsMutexUnlock(pAesHwCtxt->Mutex[Engine]);
- NvOsMemset(pSrcBufferVirtAddr, 0, DataSize);
- NvOsMemset(pDestBufferVirtAddr, 0, DataSize);
-
- // Unpinning the Memory
- NvRmPhysicalMemUnmap(pDestBufferVirtAddr, DataSize);
-
-fail4:
- NvRmPhysicalMemUnmap(pSrcBufferVirtAddr, DataSize);
-
-fail3:
- // Unpinning the Memory
- NvRmMemUnpin(hSrcMemBuf);
-
- // Unpinning the Memory
- NvRmMemUnpin(hDestMemBuf);
-
-fail2:
- NvRmMemHandleFree(hDestMemBuf);
-fail1:
- NvRmMemHandleFree(hSrcMemBuf);
-fail:
- return e;
+ return NvSuccess;
}
/**