diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-07-23 12:50:07 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-07-23 20:18:38 -0700 |
| commit | c0fd286380b8b5276c7aed6fb7a9f5eacde9f60e (patch) | |
| tree | ba6382f464d93ab140357919e537d1d09a79e8db | |
| parent | ce8283cd779d6b5004719d0bd1a36c921132c11d (diff) | |
[ARM/tegra] power: Rescaled power timers on LP0 entry.
Rescaled CPU power timers to 32kHz clock on entry to LP0 (before these
timers were rescaled only on entry to LP1, but power off timer does
affect LPO as well).
Change-Id: Ifb316170a1225767f3e9b9033b5f5cb0999504d4
Reviewed-on: http://git-master/r/4349
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Iqbal Bhinderwala <iqbalb@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/suspend.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c index 2c36e3b743aa..ce18c037c4da 100644 --- a/arch/arm/mach-tegra/suspend.c +++ b/arch/arm/mach-tegra/suspend.c @@ -417,6 +417,10 @@ static void tegra_suspend_dram(bool lp0_ok) do_div(temp, 1000000ul); cpu_off_timer_32k = temp; } + on_timer = readl(pmc + PMC_CPUPWRGOOD_TIMER); + writel(cpu_timer_32k, pmc + PMC_CPUPWRGOOD_TIMER); + off_timer = readl(pmc + PMC_CPUPWROFF_TIMER); + writel(cpu_off_timer_32k, pmc + PMC_CPUPWROFF_TIMER); reg = readl(pmc + PMC_CTRL); mode |= ((reg >> TEGRA_POWER_PMC_SHIFT) & TEGRA_POWER_PMC_MASK); @@ -424,10 +428,6 @@ static void tegra_suspend_dram(bool lp0_ok) if (!lp0_ok) { writel(TEGRA_IRAM_CODE_AREA, evp_reset); NvRmPrivPowerSetState(s_hRmGlobal, NvRmPowerState_LP1); - on_timer = readl(pmc + PMC_CPUPWRGOOD_TIMER); - writel(cpu_timer_32k, pmc + PMC_CPUPWRGOOD_TIMER); - off_timer = readl(pmc + PMC_CPUPWROFF_TIMER); - writel(cpu_off_timer_32k, pmc + PMC_CPUPWROFF_TIMER); mode |= TEGRA_POWER_CPU_PWRREQ_OE; if (pdata->separate_req) @@ -465,10 +465,10 @@ static void tegra_suspend_dram(bool lp0_ok) writel(orig, evp_reset); outer_restart(); + writel(on_timer, pmc + PMC_CPUPWRGOOD_TIMER); + writel(off_timer, pmc + PMC_CPUPWROFF_TIMER); if (!lp0_ok) { - writel(on_timer, pmc + PMC_CPUPWRGOOD_TIMER); - writel(off_timer, pmc + PMC_CPUPWROFF_TIMER); memcpy(iram_code, iram_save, iram_save_size); } else { /* for platforms where the core & CPU power requests are |