diff options
| author | Rakesh Kumar <krakesh@nvidia.com> | 2010-07-12 12:40:18 +0530 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-07-12 14:04:16 -0700 |
| commit | f51b41bfc697581cd8e7b507341ddb6b4c71f2e9 (patch) | |
| tree | f12b8e09a79be23aeb8767da0308bcc13d81869f | |
| parent | 457ec59ccfeb9059ade4c66d39823dd76abac4a2 (diff) | |
[ARM/tegra] ventana sdio odm: modify power on sequence
Enable 32KHz clock and increase delay while toggling power/reset gpio pin for
BCM4329 wifi chip
Bug 698225
Change-Id: I9471186fed458908044cb70fe961048f24092914
Reviewed-on: http://git-master/r/3427
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Tested-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/odm_kit/adaptations/misc/ventana/nvodm_sdio.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/misc/ventana/nvodm_sdio.c b/arch/arm/mach-tegra/odm_kit/adaptations/misc/ventana/nvodm_sdio.c index 3179ae75d24e..2a67cbaf91e0 100644 --- a/arch/arm/mach-tegra/odm_kit/adaptations/misc/ventana/nvodm_sdio.c +++ b/arch/arm/mach-tegra/odm_kit/adaptations/misc/ventana/nvodm_sdio.c @@ -71,14 +71,30 @@ static void NvOdmSetPowerOnSdio(NvOdmSdioHandle pDevice, NvBool enable) static NvBool SdioOdmWlanPower(NvOdmSdioHandle hOdmSdio, NvBool IsEnable) { + NvU32 RequestedPeriod, ReturnedPeriod; + NvOdmServicesPwmHandle hOdmPwm = NULL; if (IsEnable) { // Wlan Power On Reset Sequence NvOdmGpioSetState(hOdmSdio->hGpio, hOdmSdio->hPwrPin, 0x0); NvOdmGpioSetState(hOdmSdio->hGpio, hOdmSdio->hResetPin, 0x0); - NvOdmOsWaitUS(2000); + NvOdmOsSleepMS(200); NvOdmGpioSetState(hOdmSdio->hGpio, hOdmSdio->hPwrPin, 0x1); NvOdmGpioSetState(hOdmSdio->hGpio, hOdmSdio->hResetPin, 0x1); + NvOdmOsSleepMS(200); + + // Enable 32KHz clock out + hOdmPwm = NvOdmPwmOpen(); + if (!hOdmPwm) + { + NvOsDebugPrintf("sdio_odm: NvOdmPwmOpen failed\n"); + return NV_FALSE; + } + RequestedPeriod = 0; + NvOdmPwmConfig(hOdmPwm, NvOdmPwmOutputId_Blink, + NvOdmPwmMode_Blink_32KHzClockOutput, + 0, &RequestedPeriod, &ReturnedPeriod); + NvOdmPwmClose(hOdmPwm); } else { |