diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2010-07-15 09:55:49 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-07-16 16:32:33 -0700 |
| commit | 898f8b08705ecb2de8ee1af033c497273f2cd25b (patch) | |
| tree | d71940a786c3f1c8069e356899f1fe7476f7887a | |
| parent | 57c764c72125e0ac38b97c3313e7e2fb2210143d (diff) | |
tegra: Remove meaningless register write in cpuidle
Remove a meaningless write in tegra_cpuidle_init() to a
read-only status bit of the CLK_MASK_ARM register.
Change-Id: Ibc8150ebbfbf633205f7a9479047c679a4f83bc3
Reviewed-on: http://git-master/r/3972
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index 2a70f1a4e807..812c97490b90 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -59,8 +59,6 @@ static int lp2_supported = 0; #define PMC_SCRATCH_38 0x134 #define PMC_SCRATCH_39 0x138 -#define CLK_RESET_CLK_MASK_ARM 0x44 - void __init tegra_init_idle(struct tegra_suspend_platform_data *plat) { pwrgood_latency = plat->cpu_timer; @@ -225,18 +223,13 @@ static int tegra_idle_enter(unsigned int cpu) static int __init tegra_cpuidle_init(void) { unsigned int cpu = smp_processor_id(); - void __iomem *mask_arm; unsigned int reg; int ret; - mask_arm = IO_ADDRESS(TEGRA_CLK_RESET_BASE) + CLK_RESET_CLK_MASK_ARM; lp2_supported = (num_online_cpus()==1); hotcpu_notifier(tegra_idle_lp2_allowed, 0); pm_notifier(tegra_cpuidle_notifier, 0); - reg = readl(mask_arm); - writel(reg | (1<<31), mask_arm); - ret = cpuidle_register_driver(&tegra_idle); if (ret) |