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| author | Alex Frid <afrid@nvidia.com> | 2010-09-23 20:32:50 -0700 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2010-09-27 13:51:26 -0700 |
| commit | 7c97a1a4ebdff710907f9361cc05c1459cdeb510 (patch) | |
| tree | 5ce2731096c1c9b99367ed704b0a7a7cdb23614e | |
| parent | 9dd8e9ce46047e5df2a20086edd943bd6cf97a08 (diff) | |
[ARM/tegra] RM: Expanded CPU DVFS tables.
Expanded CPU DVFS tables to include AP25/T25 data.
Dependency on tegra core commit 7fedffa609eaa8288b2db93068a88a509f5268df
Bug 643434
Change-Id: I705e7373007aed0b524dda221f690162880fd585
Reviewed-on: http://git-master/r/7243
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits_private.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits_private.h b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits_private.h index fb8bb3b0e781..8727452d46b9 100644 --- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits_private.h +++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks_limits_private.h @@ -44,7 +44,7 @@ extern "C" #define NVRM_PROCESS_CORNERS (4) // Maximum supported core and/or CPU voltage characterization steps -#define NVRM_VOLTAGE_STEPS (7) +#define NVRM_VOLTAGE_STEPS (8) // Minimum required core voltage resolution #define NVRM_CORE_RESOLUTION_MV (25) |