ARM: tegra: dvfs: Update Tegra3 CPU dvfs tables

Bug 817679

Change-Id: Idd5fbdc14a3e2ff10c2636da0465eab6ab486fb9
Reviewed-on: http://git-master/r/47392
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

1 files changed, 17 insertions, 17 deletions

diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c
index 5f22cf7501b0..7f8f8ddfa174 100644
--- a/arch/arm/mach-tegra/tegra3_dvfs.c
+++ b/arch/arm/mach-tegra/tegra3_dvfs.c
@@ -57,14 +57,14 @@ static int cpu_below_core = VDD_CPU_BELOW_VDD_CORE;
 static struct dvfs_rail tegra3_dvfs_rail_vdd_cpu = {
 	.reg_id = "vdd_cpu",
 	.max_millivolts = 1150,
-	.min_millivolts = 750,
+	.min_millivolts = 850,
 	.step = VDD_SAFE_STEP,
 };
 
 static struct dvfs_rail tegra3_dvfs_rail_vdd_core = {
 	.reg_id = "vdd_core",
 	.max_millivolts = 1300,
-	.min_millivolts = 950,
+	.min_millivolts = 1000,
 	.step = VDD_SAFE_STEP,
 };
 
@@ -134,29 +134,29 @@ static struct dvfs_relationship tegra3_dvfs_relationships[] = {
 
 static struct dvfs cpu_dvfs_table[] = {
 	/* Cpu voltages (mV):	     750, 775, 800, 825, 850, 875,  900,  925,  950,  975, 1000, 1025, 1050, 1075, 1100, 1125, 1150*/
-	CPU_DVFS("cpu_g", 0, 0, MHZ, 399, 399, 541, 541, 684, 684,  817,  817,  817, 1026, 1102, 1149, 1187, 1225, 1282, 1300),
-	CPU_DVFS("cpu_g", 0, 1, MHZ, 481, 481, 652, 652, 807, 807,  948,  948,  948, 1117, 1171, 1206, 1300),
-	CPU_DVFS("cpu_g", 0, 2, MHZ, 540, 540, 711, 711, 883, 883, 1039, 1039, 1039, 1178, 1206, 1300),
-	CPU_DVFS("cpu_g", 0, 3, MHZ, 570, 570, 777, 777, 931, 931, 1102, 1102, 1102, 1216, 1300),
+	CPU_DVFS("cpu_g", 0, 0, MHZ,   1,   1,   1,   1, 684, 684,  817,  817,  817, 1026, 1102, 1149, 1187, 1225, 1282, 1300),
+	CPU_DVFS("cpu_g", 0, 1, MHZ,   1,   1,   1,   1, 807, 807,  948,  948,  948, 1117, 1171, 1206, 1300),
+	CPU_DVFS("cpu_g", 0, 2, MHZ,   1,   1,   1,   1, 883, 883, 1039, 1039, 1039, 1178, 1206, 1300),
+	CPU_DVFS("cpu_g", 0, 3, MHZ,   1,   1,   1,   1, 931, 931, 1102, 1102, 1102, 1216, 1300),
 
-	CPU_DVFS("cpu_g", 1, 0, MHZ,   1,   1, 410, 410, 550, 550,  700,  700,  700,  820,  970, 1040, 1080, 1180, 1200, 1280, 1300),
-	CPU_DVFS("cpu_g", 1, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1060, 1100, 1200, 1300),
-	CPU_DVFS("cpu_g", 1, 2, MHZ,   1,   1, 620, 620, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300),
-	CPU_DVFS("cpu_g", 1, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300),
+	CPU_DVFS("cpu_g", 1, 0, MHZ,   1,   1,   1,   1, 550, 550,  680,  680,  680,  820,  970, 1040, 1080, 1150, 1200, 1280, 1300),
+	CPU_DVFS("cpu_g", 1, 1, MHZ,   1,   1,   1,   1, 650, 650,  850,  850,  850, 1000, 1060, 1100, 1200, 1300),
+	CPU_DVFS("cpu_g", 1, 2, MHZ,   1,   1,   1,   1, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300),
+	CPU_DVFS("cpu_g", 1, 3, MHZ,   1,   1,   1,   1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300),
 
-	CPU_DVFS("cpu_g", 2, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
-	CPU_DVFS("cpu_g", 2, 2, MHZ,   1,   1, 620, 620, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
-	CPU_DVFS("cpu_g", 2, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
+	CPU_DVFS("cpu_g", 2, 1, MHZ,   1,   1,   1,   1, 650, 650,  850,  850,  850, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
+	CPU_DVFS("cpu_g", 2, 2, MHZ,   1,   1,   1,   1, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+	CPU_DVFS("cpu_g", 2, 3, MHZ,   1,   1,   1,   1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
 
-	CPU_DVFS("cpu_g", 3, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
-	CPU_DVFS("cpu_g", 3, 2, MHZ,   1,   1, 620, 620, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
-	CPU_DVFS("cpu_g", 3, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
+	CPU_DVFS("cpu_g", 3, 1, MHZ,   1,   1,   1,   1, 650, 650,  850,  850,  850, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
+	CPU_DVFS("cpu_g", 3, 2, MHZ,   1,   1,   1,   1, 720, 720,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+	CPU_DVFS("cpu_g", 3, 3, MHZ,   1,   1,   1,   1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
 
 	/*
 	 * "Safe entry" to be used when no match for chip speedo, process
 	 *  corner is found (just to boot at low rate); must be the last one
 	 */
-	CPU_DVFS("cpu_g",-1,-1, MHZ,   1,   1, 216, 216, 300),
+	CPU_DVFS("cpu_g", -1, -1, MHZ, 1,   1,   1,   1, 216, 216, 300),
 };
 
 #define CORE_DVFS(_clk_name, _speedo_id, _auto, _mult, _freqs...)	\