diff options
| author | Diwakar Tundlam <dtundlam@nvidia.com> | 2011-08-08 11:55:15 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-12 15:54:28 -0700 |
| commit | 06bad316b25b9395d6c95e21ee3c3512a58ba9b8 (patch) | |
| tree | 60717df93a7d1e793067c4e6bfa2f09ba97099a2 | |
| parent | 5f45e00a981447b020e5716268fb2d52317ab042 (diff) | |
ARM: Tegra: cpu: Set G-CPU L2 cache latency to 0x441/551
Bugid 860893
Change-Id: Ia48b5b98917d75fd4fe9cafe595558e6dd17906b
Reviewed-on: http://git-master/r/45883
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/cortex-a9.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 3a148c2cb261..812374e7c7ac 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -194,8 +194,8 @@ void __init tegra_init_cache(void) writel(0x221, p + L2X0_TAG_LATENCY_CTRL); writel(0x221, p + L2X0_DATA_LATENCY_CTRL); } else { - writel(0x331, p + L2X0_TAG_LATENCY_CTRL); - writel(0x441, p + L2X0_DATA_LATENCY_CTRL); + writel(0x441, p + L2X0_TAG_LATENCY_CTRL); + writel(0x551, p + L2X0_DATA_LATENCY_CTRL); } #else writel(0x770, p + L2X0_TAG_LATENCY_CTRL); diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S index 6a9d318b5fe9..4b0df3f9cbe7 100644 --- a/arch/arm/mach-tegra/cortex-a9.S +++ b/arch/arm/mach-tegra/cortex-a9.S @@ -661,8 +661,8 @@ ENTRY(__cortex_a9_l2x0_restart) mov32 r5, (TEGRA_FLOW_CTRL_BASE-IO_PPSB_PHYS+IO_PPSB_VIRT) ldr r5, [r5, #0x2C] @ FLOW_CTRL_CLUSTER_CONTROL ands r5, r5, #1 @ 0 == G cluster, 1 == LP cluster - movweq r5, #0x331 @ G tag - movweq r6, #0x441 @ G data + movweq r5, #0x441 @ G tag + movweq r6, #0x551 @ G data movwne r5, #0x221 @ LP tag movwne r6, #0x221 @ LP data #endif |