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authorCharlie Huang <chahuang@nvidia.com>2011-09-01 16:18:17 -0700
committerSimone Willett <swillett@nvidia.com>2011-09-12 17:06:45 -0700
commita994fae2c18aee4d1df1b1d3d11c1259fdf3264e (patch)
tree1a2a84576874a8e1418efb7d41326256451d4e0a
parent95752e3a08febc98558070c8bc4e883e5b3d32fc (diff)
arm: tegra: cardhu: change vi pll src to pll_p
Change the pll source of vi_sensor from PLL_M to PLL_P since PLL_M is more variable. Also we can get exactly 24MHz mclk rather than 24.24MHz. Bug 870687 Change-Id: I2a283d662a41d21d3598fa4ab1e8e4a110bfcd3b Reviewed-on: http://git-master/r/50382 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-cardhu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c
index c5e2d66e525f..28a75c3124fa 100644
--- a/arch/arm/mach-tegra/board-cardhu.c
+++ b/arch/arm/mach-tegra/board-cardhu.c
@@ -207,6 +207,7 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
{ "pll_a", NULL, 552960000, false},
{ "pll_a_out0", NULL, 12288000, false},
{ "d_audio", "pll_a_out0", 12288000, false},
+ { "vi_sensor", "pll_p", 150000000, false},
{ NULL, NULL, 0, 0},
};