diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2017-11-10 11:42:13 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-11-27 09:59:22 +0100 |
| commit | d7d9c0d508b44e535a447e989127e7aba3ad0ae8 (patch) | |
| tree | 38aa6b49966ad69b3c4a2fee91e4be97dafc0b8d | |
| parent | 367e924310dd0644f608907ab68d1965791b371f (diff) | |
mx6ull-colibri.dtsi: remove wrong bmode pin muxing
There are macros specifying the bmode pins for i.MX 6UL and ULL.
Don't use the UL macros.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-colibri.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index dedfbd93144a..32d5327bcb78 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -234,8 +234,6 @@ MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14 /* SODIMM 77 */ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x14 /* SODIMM 89 */ MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14 /* SODIMM 99 */ - MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x74 /* SODIMM 105 */ - MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 /* SODIMM 127 */ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14 /* SODIMM 133 */ MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x14 /* SODIMM 135 */ MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x14 /* SODIMM 100 */ |