MLK-11407-8: ARM: dts: i.mx6sx/i.mx6ul: add ldo-bypass support

add ldo-bypass support for i.mx6sx/i.mx6ul boards, remove deprecated wdog reset
way, such as 'fsl,wdog-reset = <1>', and implement it in wdog driver.

Signed-off-by: Robin Gong <b38343@freescale.com>

7 files changed, 82 insertions, 6 deletions

diff --git a/arch/arm/boot/dts/imx6sx-14x14-arm2.dts b/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
index 0b7bee2c0eea..42a903b47951 100644
--- a/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
@@ -201,7 +201,6 @@
 	fsl,cpu_pupscr_sw = <0x1>;
 	fsl,cpu_pdnscr_iso2sw = <0x1>;
 	fsl,cpu_pdnscr_iso = <0x1>;
-	fsl,wdog-reset = <1>; /* watchdog select of reset source */
 	fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
 };
 
@@ -372,8 +371,6 @@
 				MX6SX_PAD_QSPI1B_SS0_B__GPIO4_IO_30     0x17059
 				/* SD2_PWROFF */
 				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059
-				/* WDOG_B reset */
-				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY	0x10b0
 			>;
 		};
 	};
@@ -543,6 +540,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,wdog_b;
+};
+
 &iomuxc {
 	audmux {
 		pinctrl_audmux_1: audmuxgrp-1 {
@@ -1247,6 +1250,14 @@
 
 	};
 
+	wdog {
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x10b0
+			>;
+		};
+	};
+
 	weim {
 		pinctrl_weim_cs0_1: weim_cs0grp-1 {
 			fsl,pins = <
diff --git a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
index 04460cca7e6f..bcef325ad6d3 100644
--- a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
@@ -128,6 +128,10 @@
 	soc-supply = <&sw1c_reg>;
 };
 
+&gpc {
+	fsl,ldo-bypass = <1>;
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet1_1>;
@@ -357,7 +361,6 @@
 			fsl,pins = <
 				MX6SX_PAD_SD4_DATA4__GPIO6_IO_18     0x1b0b0
 				MX6SX_PAD_KEY_ROW1__GPIO2_IO_16      0x1b0b0
-				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x10b0
 			 >;
 		};
 	};
@@ -517,6 +520,12 @@
 	};
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,wdog_b;
+};
+
 &iomuxc {
 	audmux {
 		pinctrl_audmux_1: audmuxgrp-1 {
@@ -1168,6 +1177,14 @@
 
 	};
 
+	wdog {
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x10b0
+			>;
+		};
+	};
+
 	weim {
 		pinctrl_weim_cs0_1: weim_cs0grp-1 {
 			fsl,pins = <
diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
index c76b87cba275..f886e30680f7 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
@@ -12,6 +12,24 @@
 	model = "Freescale i.MX6 SoloX SDB RevA Board";
 };
 
+&cpu0 {
+	operating-points = <
+		/* kHz    uV */
+		996000  1250000
+		792000  1175000
+		396000  1075000
+		>;
+	fsl,soc-operating-points = <
+		/* ARM kHz      SOC uV */
+		996000	1175000
+		792000	1175000
+		396000	1175000
+	>;
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1c_reg>;
+	fsl,arm-soc-shared = <0>;
+};
+
 &i2c1 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 0673b66790aa..b26f37e4de41 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -25,6 +25,9 @@
 		792000	1175000
 		396000	1175000
 	>;
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1a_reg>;
+	fsl,arm-soc-shared = <1>;
 };
 
 &i2c1 {
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index e9af1a7c1c27..78301504bcff 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -181,6 +181,11 @@
 	status = "okay";
 };
 
+
+&gpc {
+	fsl,ldo-bypass = <1>;
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet1>;
@@ -383,6 +388,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,wdog_b;
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
@@ -675,5 +686,11 @@
 				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
+			>;
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
index ab67074dde39..1a71ffd0235c 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
@@ -164,7 +164,6 @@
 	fsl,cpu_pupscr_sw = <0x0>;
 	fsl,cpu_pdnscr_iso2sw = <0x1>;
 	fsl,cpu_pdnscr_iso = <0x1>;
-	fsl,wdog-reset = <1>; /* watchdog select of reset source */
 	fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
 };
 
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index 2601ba6ffc29..9a0145ec896b 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -204,7 +204,6 @@
 	fsl,cpu_pupscr_sw = <0x0>;
 	fsl,cpu_pdnscr_iso2sw = <0x1>;
 	fsl,cpu_pdnscr_iso = <0x1>;
-	fsl,wdog-reset = <1>; /* watchdog select of reset source */
 	fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
 };
 
@@ -522,6 +521,12 @@
 				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+			>;
+		};
 	};
 };
 
@@ -664,3 +669,9 @@
 	enable-sdio-wakeup;
 	status = "okay";
 };
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,wdog_b;
+};