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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-03-09 23:05:21 -0500
committerDinh Nguyen <dinguyen@opensource.altera.com>2015-05-11 13:14:59 -0500
commit1dfb7d2fd6a8f9c69f0b434473637d88917c9ec7 (patch)
treea403e5b714534a642f0ad7fc808f4359cc7ea861
parent08d6638f1a3cf5f6add4ecfd58d28c53b206dbcb (diff)
ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart nodes should be enabled in the appropriate board file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
-rw-r--r--arch/arm/boot/dts/socfpga_arria10.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 69d616a05b14..d8436095b1dd 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -268,6 +268,7 @@
reg = <0xff808000 0x1000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
fifo-depth = <0x400>;
+ status = "disabled";
};
ocram: sram@ffe00000 {
@@ -324,6 +325,7 @@
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
uart1: serial1@ffc02100 {
@@ -332,6 +334,7 @@
interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
usbphy0: usbphy@0 {